hef4526b NXP Semiconductors, hef4526b Datasheet - Page 7

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hef4526b

Manufacturer Part Number
hef4526b
Description
Programmable 4-bit Binary Down Counter
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
AC CHARACTERISTICS
V
Note
1. In the divide-by-n mode (PL connected to TC), one has to observe the maximum HIGH to LOW propagation delay
January 1995
Minimum clock
Minimum clock
Minimum PL
Minimum MR
Hold time
Set-up time
Maximum clock
SS
Programmable 4-bit binary down counter
pulse width CP
pulse width CP
pulse width; HIGH
pulse width; HIGH
P
P
pulse frequency
PL = LOW
for CP to TC, before applying the next clock pulse.
= 0 V; T
n
n
LOW
HIGH
PL
PL
amb
= 25 C; C
0
1
L
= 50 pF; input transition times
V
10
15
10
15
10
15
10
15
10
15
10
15
10
15
V
DD
5
5
5
5
5
5
5
t
t
t
t
t
t
f
WCPL
WCPH
WPLH
WMRH
hold
su
max
SYMBOL
MIN. TYP.
100
130
80
40
30
80
40
30
40
32
50
40
30
20
15
30
20
15
12
16
6
7
20 ns
40
20
15
40
20
15
50
20
16
65
25
20
12
25
32
5
5
5
0
0
0
MAX.
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
see also waveforms
see note 1
Figs 5 and 6
Product specification
HEF4526B
MSI

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