74hct193 NXP Semiconductors, 74hct193 Datasheet - Page 20

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74hct193

Manufacturer Part Number
74hct193
Description
Presettable Synchronous 4-bit Binary Up/down Counter
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
74HC_HCT193_3
Product data sheet
Fig 13. The data input (Dn) to parallel load input (PL) set-up and hold times
Fig 14. The data input (Dn), parallel load input (PL) and the master reset input (MR) to the terminal count outputs
Fig 15. The CPU to CPD or CPD to CPU hold times
The shaded areas indicate when the input is permitted to change for predictable output performance.
Measurement points are given in
Logic levels V
Measurement points are given in
t
Logic levels V
(TCU, TCD) propagation delays
Measurement points are given in
PLH
and t
PHL
are the same as t
OL
OL
and V
and V
OH
OH
are typical output voltage drops that occur with the output load.
are typical output voltage drops that occur with the output load.
Dn input
PL input
Qn output
PL, MR, Dn
input
TCU, TCD
output
CPU or CPD
input
CPD or CPU
input
pd
.
Table
Table
Table
GND
GND
V
V
GND
OH
V
OL
V
V
V
OH
OL
I
I
V
GND
GND
10.
10.
10.
I
V
V
t
I
I
PLH
Rev. 03 — 23 May 2007
V
M
V
M
V
V
M
t
V
su
Presettable synchronous 4-bit binary up/down counter
M
M
t
h
t
h
V
M
74HC193; 74HCT193
t
su
001aag419
001aag418
001aag417
t
h
t
PHL
© NXP B.V. 2007. All rights reserved.
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