nb4l16m ON Semiconductor, nb4l16m Datasheet - Page 9

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nb4l16m

Manufacturer Part Number
nb4l16m
Description
2.5v/3.3v, 5 Gb/s Multi Level Clock/data Input To Cml Driver / Receiver / Buffer / Translator With Internal Termination
Manufacturer
ON Semiconductor
Datasheet

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Table 6. INTERFACING OPTIONS
INTERFACING OPTIONS
RSECL, PECL, NECL
LVTTL, LVCMOS
AC-COUPLED
LVDS
CML
Connect V
Connect V
Bias V
Standard ECL Termination Techniques
An External Voltage (V
V
THR
is 1.5 V for LVTTL and V
TD
and V
TD
TD
and V
and V
TD
Figure 19. CML Output Structure
Inputs within Common Mode Range (V
TD
TD
50 W
to V
Together
THR
) should be applied to the unused complementary differential input. Nominal
CC
http://onsemi.com
V
CC
CC
NB4L16M
V
/2 for LVCMOS inputs. This voltage must be within the V
EE
16 mA
9
CONNECTIONS
50 W
CMR
)
Q
Q
THR
specification.

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