nb4l16m ON Semiconductor, nb4l16m Datasheet - Page 10

• Manufacturer Part Number: nb4l16m
• Description: 2.5v/3.3v, 5 Gb/s Multi Level Clock/data Input To Cml Driver / Receiver / Buffer / Translator With Internal Termination
• Manufacturer: ON Semiconductor

input signal (LVDS, PECL, or CML) are minimum input swing of 75 mV and the maximum input swing of 2500 mV. Within
these conditions, the input voltage can range from V
environment (Z = 50 W).
All NB4L16M inputs can accept LVPECL, CML, LVTTL, LVCMOS and LVDS signal levels. The limitations for differential
Recommended R
5.0 V 290 W
3.3 V 150 W
2.5 V 80 W
V
CC
R
T
T
Values
PECL
Driver
V
V
50 W
EE
V
CC
EE
V
CC
Figure 21. PECL to CML Receiver Interface
50 W
R
V
Figure 20. CML to CML Interface
T
EE
Q
Application Information
R
Q
T
50 W
50 W
http://onsemi.com
CC
NB4L16M
to 1.2 V. Examples interfaces are illustrated below in a 50 W
Z
Z
10
Z
Z
V
V
BIAS
BIAS
V
V
CC
CC
V
V
V
V
TD
TD
TD
TD
D
D
D
D
50 W
50 W
V
V
50 W
50 W
EE
EE
V
V
CC
CC