nb4n316m ON Semiconductor, nb4n316m Datasheet
nb4n316m
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nb4n316m Summary of contents
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... AnyLevel input signals: LVPECL, CML, LVCMOS, LVTTL, or LVDS. These signals will be translated to CML, operating up to 2.0 GHz or 2.5 Gb/s, respectively. As such, the NB4N316M is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications. The CML outputs are 16 mA open collector (see Figure 18) which requires resistor (R termination voltage (see Figure 19) ...
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... Q CML Output 7 Q CML Output the differential configuration if no signal is applied on D/D input, then the device will be susceptible to self-oscillation. NB4N316M Connect. Noninverted Differential Input. (Note 1) Inverted Differential Input. (Note 1) Internally Generated Reference Voltage Supply. Negative Supply Voltage. ...
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... Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 2. JEDEC standard multilayer board - 1S2P (1 signal, 2 power) with 8 filled thermal vias under exposed pad. NB4N316M Characteristics Human Body Model Machine Model ...
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... applied to the complementary input when operating in single-ended mode (MIN) varies 1:1 with CMR EE CMR 7. Parameter guaranteed by design and evaluation but not tested in production. NB4N316M IHD ILD - V |) (Note 7) IHD ILD for proper operation. Outputs must be connected through R TT ...
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... 300 200 100 0 0.5 0.75 1 1.25 INPUT CLOCK FREQUENCY (GHz 3 3 255C Figure 3. Output Voltage Amplitude (V NB4N316M = 3 3 (Note -40°C Min Typ Max = 50 W) ≤ 1 GHz f 550 660 in ≤ 1.5 GHz f 400 640 in ≤ 2.0 GHz ...
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... TEMPERATURE (°C) Figure 6. Typical Propagation Delay vs. Temperature ( 3 255C 100 mV -40 Figure 8. Supply Current vs. Temperature NB4N316M NB4N316M -40° 25°C 0 1.5 1.75 2 0.25 0.5 Figure 5. Data Dependent Jitter vs. Frequency = 3.3 V and Temperature ( - 255C ...
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... NB4N316M DDJ = 5 ps TIME (266.8 ps/div) Figure 9. Typical Differential Output Waveform at 750 Mb Left Plot Right Plot DDJ = 12 ps TIME (133.2 ps/div) Figure 10. Typical Differential Output Waveform 1.5 Gb Left Plot Right Plot DDJ = 20 ps TIME (80 ps/div) Figure 11 ...
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... Figure 14. Differential Input Driven Single-Ended IHmax V thmax V ILmax IHmin V thmin V ILmin GND Figure 16. V Diagram th NB4N316M V INPP V OUTPP t PHL t PLH = 2 Figure 15. Differential Inputs Driven CMmax ...
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... V CC Input 1. ESD C 1. Input ESD V EE Input NB4N316M Input 1. ESD 1. Input ESD Internal Current Source Figure 18. CML Input and Output Structure http://onsemi.com Current Source V EE Output ...
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... 3.3 V CCC NB4N316M 3.3 V CCD Z = 100 W NB4N316M Z = 100 Figure 19. Typical Examples of the Application Interface NB4N316M TTA CCA TTB CCB TTC CCC ...
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... AN1504/D AN1568/D AN1672/D AND8001/D - Odd Number Counters Design AND8002/D - Marking and Date Codes AND8020/D - Termination of ECL Logic Devices AND8066/D - Interfacing with ECLinPS AND8090 Characteristics of ECL Devices NB4N316M Package TSSOP-8 (Pb-Free) TSSOP-8 (Pb-Free) - ECL Clock Distribution Techniques - Designing with PECL (ECL at +5.0 V) ...
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... B 2.90 3.10 0.114 0.122 C 0.80 1.10 0.031 0.043 D 0.05 0.15 0.002 0.006 -W- F 0.40 0.70 0.016 0.028 G 0.65 BSC 0.026 BSC K 0.25 0.40 0.010 0.016 L 4.90 BSC 0.193 BSC Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NB4N316M/D ...