max98088 Maxim Integrated Products, Inc., max98088 Datasheet - Page 54
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max98088
Manufacturer Part Number
max98088
Description
Stereo Audio Codec With Flexsound Technology
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.MAX98088.pdf
(123 pages)
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Stereo Audio Codec
with FLEXSOUND Technology
54
C6, C7, D5, D6,
C1, C2
C3, D3
C4, C5
A1, B1
A2, B2
A3, B3
A4, B4
A5, B5
D7, E3
PIN
A6
A7
A8
A9
B6
B7
B8
B9
C8
C9
D1
D2
D4
D8
D9
E1
E2
E4
RECN/LOUTR/
RECP/LOUTL/
SPKRGND
SPKLGND
SPKLVDD
SPKRVDD
SDOUTS1
LRCLKS1
DVDDS1
BCLKS1
HPGND
SDINS1
HPVDD
SPKRN
HPSNS
SPKLN
HPVSS
SPKRP
SPKLP
RXINN
NAME
RXINP
MCLK
PVDD
INB2
C1N
N.C.
HPR
C1P
HPL
Negative Right-Channel Class D Speaker Output
Right-Speaker Ground
Left-Speaker, REF, Receiver Amp Power Supply. Bypass to SPKLGND with a 1FF and a
10FF capacitor.
Positive Left-Channel Class D Speaker Output
Negative Left-Channel Class D Speaker Output
Positive Receiver Amplifier Output or Left Line Output. Can be positive bypass switch input
when receiver amp is shut down.
Headphone Power Supply. Bypass to HPGND with a 1FF capacitor.
Inverting Charge-Pump Output. Bypass to HPGND with a 1FF ceramic capacitor.
Headphone Ground
Negative Receiver Amplifier Output or Right Line Output. Can be negative bypass switch
input when receiver amp is shut down.
Charge-Pump Flying Capacitor Positive Terminal. Connect a 1FF ceramic capacitor
between C1N and C1P.
Charge-Pump Flying Capacitor Negative Terminal. Connect a 1FF ceramic capacitor
between C1N and C1P.
Noninverting Charge-Pump Output. Bypass to HPGND with a 1FF ceramic capacitor.
Positive Right-Channel Class D Speaker Output
Right-Speaker Power Supply. Bypass to SPKRGND with a 1FF capacitor.
Left-Speaker Ground
No Connection
Headphone Amplifier Ground Sense. Connect to the headphone jack ground terminal or
connect to ground.
Left-Channel Headphone Output
S1 Digital Audio Bit Clock Input/Output. BCLKS1 is an input when the ICs are in slave mode
and an output when in master mode. The input/output voltage is referenced to DVDDS1.
S1 Digital Audio Serial-Data ADC Output. The output voltage is referenced to DVDDS1.
S1 Digital Audio Left-Right Clock Input/Output. LRCLKS1 is the audio sample rate clock
and determines whether S1 audio data is routed to the left or right channel. In TDM mode,
LRCLKS1 is a frame sync pulse. LRCLKS1 is an input when the IC is in slave mode and an
output when in master mode.
Single-Ended Line Input B2. Also positive differential line input B.
Right-Channel Headphone Output
S1 Digital Audio Interface Power-Supply Input. Bypass to DGND with a 1FF capacitor.
Master Clock Input. Acceptable input frequency range is 10MHz to 60MHz.
S1 Digital Audio Serial-Data DAC Input. The input/output voltage is referenced to DVDDS1.
The input voltage is referenced to DVDDS1.
FUNCTION
Pin Description
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