max9394eti-t Maxim Integrated Products, Inc., max9394eti-t Datasheet - Page 10

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max9394eti-t

Manufacturer Part Number
max9394eti-t
Description
2 1 Multiplexers And 1 2 Demultiplexers With Loopback
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
The output common-mode voltage is not properly
established if the LVDS output is higher than 0.6V when
the supply voltage is ramping up at power-on. This
condition can occur when an LVDS output drives an
LVDS input on the same chip. To avoid this situation for
the MAX9394/MAX9395, connect a 10kΩ resistor from
the noninverting output (OUT_) to ground, and connect
a 10kΩ resistor from the inverting output (OUT_) to
ground. These pulldown resistors keep the output
below 0.6V when the supply is ramping up (Figure 7).
Bypass each V
mount ceramic 0.1µF and 0.01µF capacitors in parallel
as close to the device as possible. Install the 0.01µF
capacitor closest to the device.
Input and output trace characteristics affect the perfor-
mance of the MAX9394/MAX9395. Connect each input
and output to a 50Ω characteristic impedance trace.
Maintain the distance between differential traces and
eliminate sharp corners to avoid discontinuities in dif-
ferential impedance and maximize common-mode
noise immunity. Minimize the number of vias on the dif-
ferential input and output traces to prevent impedance
discontinuities. Reduce reflections by maintaining the
50Ω characteristic impedance through connectors and
across cables. Minimize skew by matching the electri-
cal length of the traces.
Terminate LVDS outputs with a 100Ω resistor between
the differential outputs at the receiver inputs. LVDS out-
puts require 100Ω termination for proper operation.
Ensure that the output currents do not exceed the cur-
rent limits specified in the Absolute Maximum Ratings.
2:1 Multiplexers and 1:2 Demultiplexers with
Loopback
Table 1. Input Select Truth Table
X = Don’t care.
10
______________________________________________________________________________________
LB_SELA
0
0
0
1
1
1
1
CC
to GND with high-frequency surface-
LOGIC INPUTS
Power-Supply Bypassing
LB_SELB
Output Termination
0
0
1
0
0
1
1
Differential Traces
Differential Outputs
BSEL
X
0
1
0
1
0
1
Observe the total thermal limits of the MAX9394/
MAX9395 under all operating conditions.
Use matched differential impedance for transmission
media. Use cables and connectors with matched differ-
ential impedance to minimize impedance discontinu-
ities. Avoid the use of unbalanced cables.
Balanced cables such as twisted pair offer superior
signal quality and tend to generate less EMI due to
canceling effects.
Use a four-layer printed circuit (PC) board providing
separate signal, power, and ground planes for high-
speed signaling applications. Bypass V
close to the device as possible. Install termination
resistors as close to receiver inputs as possible. Match
the electrical length of the differential traces to minimize
signal skew.
Table 2. Loopback Select Truth Table
Figure 7. Pulldown Resistor Configuration for LVDS Outputs
OUTA_ / OUTA_
MAX9394
MAX9395
INB0 selected
INB1 selected
INB0 selected
INB1 selected
GND or open
INA selected
INA selected
INA selected
LB_SEL_
V
CC
DIFFERENTIAL OUTPUTS
OUT_
OUT_
10kΩ
Cables and Connectors
GND
Loopback inputs selected.
10kΩ
Normal inputs selected.
100Ω DIFFERENTIAL
TRANSMISSION LINE
OUT_ _
OUTB / OUTB
INB0 selected
INB1 selected
INB0 selected
INB1 selected
INA selected
INA selected
INA selected
Board Layout
CC
100Ω
to GND as
TERMINATION
RESISTOR

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