max9975 Maxim Integrated Products, Inc., max9975 Datasheet - Page 27

• Manufacturer Part Number: max9975
• Description: Max9975 Dual, Low-power, 1200mbps Ate Driver/comparator With 35ma Load
• Manufacturer: Maxim Integrated Products, Inc.

Table
LLEAK control the switching. In high-impedance mode,
the bias current at DUT_ is less than 3µA over the 0 to
3V range, while the node maintains its ability to track
high-speed signals. In low-leakage mode, the bias cur-
rent at DUT_ is further reduced to less than 15nA, and
signal tracking slows. See the Low-Leakage Mode,
LLEAK section for more details.
The nominal driver output resistance can be trimmed to
different values. Contact the factory for different resis-
tance values within the 45Ω to 51Ω range.
Configure the voltage clamps (high, CPHV_ and low,
CPLV_) to limit the voltage at DUT_ and to suppress
reflections when the channel is configured as a high-
impedance receiver. The clamps behave as diodes
connected to the outputs of high-current buffers.
Internal circuitry compensates for the diode drop at
1mA clamp current. Set the clamp voltages using the
external connections CPHV_ and CPLV_. The clamps
are enabled only when the driver is in high-impedance
mode (Figure 2). For transient suppression, set the
clamp voltages to approximately the minimum and
maximum expected DUT_ voltage range. The optimal
clamp voltages are application specific and must be
empirically determined. If clamping is not desired, set
the clamp voltages at least 0.7V outside the expected
DUT_ voltage range; overvoltage protection remains
active without loading DUT_.
The MAX9975 provides two independent high-speed
comparators for each channel. Each comparator has one
input connected internally to DUT_ and the other input
connected to either CHV_ or CLV_ (see the Functional
CONNECTIONS
DATA
EXTERNAL
X
X
X
1
0
1. Driver Logic
RCV
X
0
0
1
1
TMSEL LLEAK
______________________________________________________________________________________
REGISTER
INTERNAL
CONTROL
X
X
1
0
X
0
0
0
0
1
Driver/Comparator with 35mA Load
High-impedance mode
Low-leakage mode
Dual, Low-Power, 1200Mbps ATE
Comparators
Drive to DHV_
Drive to DLV_
Drive to DTV_
(term mode)
OUTPUT
DRIVER
(high-Z)
Clamps
Diagram). Comparator outputs are a logical result of the
input conditions, as indicated in Tables 2 and 3.
The comparator differential outputs are open-collector
outputs to ease interfacing with a wide variety of logic
families. Internal termination resistors switch a 16mA
current source between the two outputs (Figure 3). The
termination resistors connect the outputs to voltage input
V
Each output provides a nominal 800mV
50Ω source termination. If an additional external 50Ω
destination termination is used to double-terminate the
line, the nominal 800mV swing will be halved.
The upper comparators are configurable as differential
receivers for LVDS and other differential DUT_ signals.
When mode bit CDIFF is asserted, the upper compara-
tor inputs are routed from the DUT_ outputs for both
channels.
The comparator function incorporates hysteresis control.
Hysteresis rejects noise and prevents oscillations on
low-slew input signals. External resistors control hystere-
sis levels. HYS1 controls channel 1 and HYS2 controls
channel 2, when the MAX9975 is programmed in single-
ended compare mode (CDIFF = 0). HYS1 also controls
channel 2’s high-comparator output when the MAX9975
is programmed in differential compare mode (CDIFF =
1). With HYS_ unconnected, the programmed hysteresis
is 0mV. Connect an external resistor between HYS_ and
GND to program nonzero hysteresis. See the Typical
Operating Characteristics for typical resistance values.
Table
(Single-Ended Compare Mode)
Table
(Differential Compare Mode)
DUT1 > DUT2 DUT_ > CLV_
CCO
SC1
0
0
1
1
_. Connect V
0
0
1
1
2. Comparator Logic, CDIFF = 0
3. Comparator Logic, CDIFF = 1
SC0
0
1
0
1
CCO
0
1
0
1
_ to the desired V
DRIVER SLEW RATE (%)
CL_
0
1
0
1
100
75
50
25
P-P
Hysteresis
OH
swing and
voltage.
CH_
0
0
1
1
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