pi90lvt211le Pericom Semiconductor Corporation, pi90lvt211le Datasheet - Page 3

• Manufacturer Part Number: pi90lvt211le
• Description: 1 6 Differential Clock Distribution Chip
• Manufacturer: Pericom Semiconductor Corporation

1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Switching Characteristics over Recommended Operating Conditions
Notes:
1. Within-Device skew is defined for identical transitions on similar paths through a device.
2. Setup, Hold, and Disable times are all relative to a falling edge on CLK or SCLK.
3. Minimum input swing for which AC parameters are guaranteed. Full DC LVDS output swings will be generated with only 50mV input
4. The range in which the high level of the input swing must fall while meeting the V
5. t
6. t
7. Generator input conditions: t
8. C
9. Generator waveform for all tests unless otherwise specified: f = 25 MHz, Z
C
e S
C
C
P
i D
P
P
H
M
i R
D
M
E
C
C
0 2
S
C
o r
C
S
S
C
a
C
C
W
r e
y
o
a h
o
u
swings.
temperature and V
parameter is guaranteed by design and characterization.
Output Criteria: 60%/40% duty cycle, V
delay and minimum skew, clock input edge rates should not be slower than 1ns/V; control signals not slower than 3ns/V.
N
C
a s
u t
E
L
i n i
e s
L
a
SKIR
SK2R
- t r
l c
. m
C
E
d l
y t
L
L
L
L
L
p
o i
h t i
N
K
L
K
i x
x
–
n
L
K
L
K
K
K
- e
p
g a
b
F /
m
includes probe and fixture capacitance.
o t
K
e n
d
m
o t
i T
C
K
e l
M
o t
o t
i T
o t
o t
o t
D
0 8
u
l l a
is the difference in receiver propagation delay (t
o t
r o
P -
D (
S (
t a
is the difference in receiver propagation delay between channels in the same device of any outputs switching in the same direction. This
J
u
c y
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m
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e
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o
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a
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S
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L
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t u
s e
K
C
K
e k
s i
O
C
a
l e
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Q
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a r
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L
n
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n
E
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S
y a
o t
w
t t i
T
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e g
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n
w
T
N
i t
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t r
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T
C
l e
CC
T
±
g n
r e
±
T
C
o i
o t
h
o t
±
g n
±
C (
. The propagation delay specification is a device-to-device worst case over process, voltage, and temperature.
S
L
r a
n
±
F
Q
e k
O
K
L
c a
C (
P
e r
O
K
u
l u
, w
e t
p t
L
q
U
)
e s
e u
K
s i r
t u
a s
T
r
t
)
f
n
S
±
m
c i t
< 1ns, 50% duty cycle, differential (1.10V to 1.35V peak-peak).
y c
e k
e
w
e
d
t (
e g
P
OL
L
H
(max) 0-4V, V
t -
P
H
L
)
PLH
-t
S
OH
V
t
t
t
t
PHL
y
t
t
t
t
t
t
( t i j
t
S
S
S
t
t
V
i j
s
P
P
P
P
P
P
C
r
m
K
K
K
e k
c ( t
t ,
t
t
L
H
H
Z
(min) 2.7V, Load - 7pF (stray plus probes).
L
Z
e p
h
P
s
M
1
1
2
H
H
) of one device, and is the duty cycle distortion of the output at any given
b
Z
L
L
Z
w
) c
P
f
R
R
R
) r
R
l o
3
O
0
M
. 0
–
–
2
2
1
= 50 ohms, t
1 .
1
1
1
8 4
4 2
0 0
0 0
0 5
5 .
5 .
5 .
0 2
. n i
5 2
PP
spec.
1 –
r
T
4
6
1
2
2
2
2
2
3
2
2
1
5 2
0 3
= 1ns, t
y
0
0 0
0 0
0 5
0 4
7 .
7 .
7 .
2 .
6 .
8 .
1 .
5 .
0 0
. p
(unless otherwise noted)
f
= 1ns (35%-65%). To ensure fastest propagation
V
C
M
0
T
T
T
2 1
. 3
+
+
7
C
1
1
4
4
3
3
2
2
8 .
0 6
B
B
B
0 6
8 4
4 2
0 8
0 0
a
4 .
4 2
6 .
8 .
8 .
8 .
8 .
-
0 0
0 0
D
D
D
. x
0
2 .
PI90LV211/PI90LVT211
1:6 Differential Clock
U
M
n
s n
s p
s p
V
H
(8,9)
s t i
Distribution Chip
z
.
PS8535C
C
i F
i F
o
n
u g
u g
d
2
2
2
3
4
5
6
7
1
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e r
t i
o i
10/04/04
6
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