pi90lvt211le Pericom Semiconductor Corporation, pi90lvt211le Datasheet
pi90lvt211le
Manufacturer Part Number
pi90lvt211le
Description
1 6 Differential Clock Distribution Chip
Manufacturer
Pericom Semiconductor Corporation
Datasheet
1.PI90LVT211LE.pdf
(9 pages)
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Features
• Meets or Exceeds Requirements of ANSI TIA/EIA-644-1995
• Designed for Clocking Rates up to 320MHz
• Operates from a single 3.3-V Supply
• Low-Voltage Differential Signaling (LVDS) with Output
• Choice between LVDS or TTL clock input
• Synchronous Enable/Disable
• Multiplexed clock input
• Common and individual Enable/Disable control
• 50ps Output-to-Output Skew
• ±24ps Period Jitter
• Bus Pins are High Impedance when disabled or with V
• TTL Inputs are 5V Tolerant
• Power Dissipation at 300 MHz
• P190LV211 is functionally compatible with Motorola’s
• >12kV ESD Protection
• Packaging (Pb-free & Green available):
Block Diagram & Pin Configuration
Voltages of ±350mV into a 100-ohm load
– Internal 300 kohm pullup resistor on all control pins
– CLK and CLK have 110-ohm termination (PI90LVT211)
(PECL) MC 10E211/MC100E211
- 28-pin TSSOP (L)
- 28-pin QSOP (Q)
PI90LVT211
SCLK
GND
GND
CEN
EN2
CLK
CLK
EN3
SEL
EN4
EN5
EN6
V
EN1
CC
Only 110
10
11
12
13
14
1
2
3
4
5
6
7
8
9
1
0
D
D
D
D
D
D
Q
Q
Q
Q
Q
Q
28
27
26
25
24
23
22
21
20
19
18
17
16
15
CC
V
CLK1
CLK1
CLK2
CLK2
CLK3
CLK3
CLK4
CLK4
CLK5
CLK5
CLK6
CLK6
GND
CC
<1.5V
OUT+
OUT–
OUT+
OUT–
OUT+
OUT–
OUT+
OUT–
OUT+
OUT–
OUT+
OUT–
1
Description
The PI90LV211 implements low voltage differential signaling (LVDS)
to achieve clocking rates as high as 320 MHz with low skew. The
PI90LV211 is a low skew 1:6 fanout device designed explicitly for low
skew clock distribution applications. The device features a multi-
plexed clock input to allow for the distribution of a lower speed scan
or test clock with the high-speed system clock. When LOW the SEL
pin will select the differential clock input.
Both a common enable and individual output enables are provided.
When asserted the positive output will go LOW on the next negative
transition of the CLK (or SCLK) input. The enable function is
synchronous so that the outputs will only be enabled/disabled when
they are already in the LOW state. This avoids any chance of
generating a runt clock pulse when the device is enabled/disabled
as can happen with an asynchronous control. The internal flip flop
is clocked on the falling edge of the input clock, therefore all
associated specification limits are referenced to the negative edge
of the clock input.
Individual synchronous enable controls and multiplexed clock in-
puts make this device ideal as the first level distribution unit in a
distribution tree. The individual enables could be used to allow for the
disabling of individual cards on a backplane in fault tolerant designs.
Function Table
*
** CEN disables all six banks
Z = High Impedance
C
= Negative transition of CLK or SCLK
L
K
1:6 Differential Clock Distribution Chip
H
ENx disables individual banks
X
C /
L /
L
K
S
C
H
X
L /
L
K
PI90LV211/PI90LVT211
S
H
X
H
E
L
L
E
N
H
L
L
L
x
C
E
H
L
L
L
N
C
PS8535C
L
K
S
C
Z
C
O
Z
L
* *
L
*
U
K
K
T
10/04/04
(
) ±
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pi90lvt211le Summary of contents
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... Ordering Information Ordering Code PI90LV211L PI90LV211LE PI90LV211Q PI90LV211QE PI90LVT211L PI90LVT211LE PI90LVT211Q PI90LVT211QE Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ Package Code L 28-pin 173-mil TSSOP L Pb-free & ...