lmk04000bisqx National Semiconductor Corporation, lmk04000bisqx Datasheet - Page 6

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lmk04000bisqx

Manufacturer Part Number
lmk04000bisqx
Description
Lmk04000 Family Of Precision Clock Conditioners Low-noise Clock Jitter Cleaner With Cascaded Plls
Manufacturer
National Semiconductor Corporation
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
lmk04000bisqx/NOPB
Manufacturer:
TI/NS
Quantity:
291
www.national.com
6.0 Pin Descriptions
Pin Number
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
1
2
3
4
5
6
7
8
9
CLKin0_LOS
CLKin1_LOS
DATAuWire
CLKuWire
DLD_BYP
CLKout0*
CLKout1*
LDObyp1
LDObyp2
Name(s)
LEuWire
CLKout0
CLKout1
CLKin0*
CLKin1*
CLKin0
CPout1
CLKin1
OSCin*
CPout2
SYNC*
OSCin
V
V
V
GND
V
V
GOE
V
GND
V
V
V
V
V
V
Fout
Bias
CC
CC
CC
NC
LD
CC
CC
CC
CC
CC
CC
CC
CC
CC
10
11
12
1
2
3
4
5
6
7
8
9
I/O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
LVDS/LVPECL
LVDS/LVPECL
LVCMOS
LVCMOS
LVPECL
LVPECL
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
ANLG
ANLG
ANLG
ANLG
ANLG
ANLG
ANLG
ANLG
ANLG
ANLG
ANLG
ANLG
ANLG
Type
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
GND
GND
6
Description
Ground (For Fout Buffer)
VCO Frequency Output Port
Power Supply
Microwire Clock Input
Microwire Data Input
Microwire Latch Enable Input
No Connection
Power Supply
LDO Out, bypassed to ground with 10 µF and 0.1 µF
capacitor
LDO Bypass, bypassed to ground with a 0.1 µF
capacitor
Global Output Enable
Lock Detect and PLL multiplexer Output
Power Supply CLKout0
Clock Channel 0 Output
Clock Channel 0* Output
DLD Bypass, bypassed to ground with a 0.1 µF
capacitor
Ground (Digital)
Power Supply (Digital)
Power Supply (CLKin0)
Reference Clock Input Port for PLL1 - AC or DC
Coupled (Note 2)
Reference Clock Input Port for PLL1 (complimentary)
- AC or DC Coupled (Note 2)
Power Supply (PDCP1)
Charge Pump1 Output
Power Supply
Reference Clock Input Port for PLL1 - AC or DC
Coupled (Note 2)
Reference Clock Input Port for PLL1 (complimentary)
- AC or DC Coupled (Note 2)
Global Clock Output Synchronization
Reference oscillator Input for PLL2 - AC or DC
Coupled (Note 2)
Reference oscillator Input for PLL2 - AC or DC
Coupled (Note 2)
Power Supply (OSCin)
Power Supply (PDCP2)
Charge Pump2 Output
Power Supply (VCO Divider, PLL2 N-Counter)
Status of CLKin0 reference clock input
Status of CLKin1 reference clock input
Bias Bypass. AC coupled with 1 µF capacitor to Vcc1
Power Supply (CLKout1)
Clock Channel 1 Output
Clock Channel 1* Output
Power Supply (CLKout2)

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