cy7b952 Cypress Semiconductor Corporation., cy7b952 Datasheet

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cy7b952

Manufacturer Part Number
cy7b952
Description
Sst Sonet/sdh Serial Transceiver
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Cypress Semiconductor Corporation
Document #: 38-02018 Rev. *B
Features
• OC-3 Compliant with Bellcore and CCITT (ITU) specifi-
• SONET/SDH and ATM Compliant
• Compatible with IGT WAC013, IGT WAC413, and
• Clock and data recovery from 51.84- or 155.52-MHz
• 155.52-MHz clock multiplication from 19.44-MHz source
• 51.84-MHz clock multiplication from 6.48-MHz source
• ±1% frequency agility
• Line Receiver Inputs: No external buffering required
• Differential output buffering
Logic Block Diagram
cations on:
— Jitter Generation (<0.01 UI)
— Jitter Transfer (<130 kHz)
— Jitter Tolerance
PMC-Sierra PM5343
datastream
TOUT–
TOUT+
RIN+
RIN–
CD
FC+
FC–
REFCLK+
LOOP(t)
Figure 1. SONET/SDH Overhead Processing Application
Clock/Data
Recovery
Driver
Line
Cypress
CY7B952
SST
PLL
REFCLK–
PLL
x8
3901 North First Street
SST™ SONET/SDH Serial Transceiver
RECEIVE
TRANSMIT
MODE
S->P
P->S
PM5343STXC
PMC-Sierra
SONET/SDH
Transceiver
Overhead
Transport
Functional Description
The SONET/SDH Serial Transceiver (SST) is used in
SONET/SDH and ATM applications to recover clock and data
information from a 155.52-MHz or 51.84-MHz NRZ or NRZI
serial data stream and to provide differential data buffering for
the Transmit side of the system.
• 100K ECL compatible I/O
• No output clock “drift” without data transitions
• Link Status Indication
• Loop-back testing
• Single +5V supply
• 24-pin SOIC
• Compatible with fiber-optic modules, coaxial cable, and
• Power-down options to minimize power or crosstalk
• Low operating current: <70 mA
• 0.8µ BiCMOS
RCLK+
RCLK–
RSER+
RSER–
LFI(t)
TSER+
TSER–
TCLK+
TCLK–
twisted pair media
Pin Configuration
REFCLK–
REFCLK+
San Jose
TOUT+
TOUT–
MODE
LOOP
RIN+
RIN–
SONET/SDH
PM5344SPTX
FC+
FC–
Transceiver
PMC-Sierra
V
Overhead
CD
CC
Path
,
CA 95134
1
2
3
4
5
6
7
8
9
10
11
12
Top View
CY7B952
SOIC
Revised April 27, 2004
13
14
24
23
22
21
20
19
18
17
16
15
408-943-2600
CY7B952
RCLK–
RCLK+
RSER–
RSER+
LFI
V
V
V
TCLK–
TCLK+
TSER+
TSER–
CC
SS
CC
[+] Feedback

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cy7b952 Summary of contents

Page 1

... North First Street • San Jose CY7B952 SOIC Top View 1 24 RCLK– 23 RCLK RSER– RSER LFI CY7B952 TCLK– TCLK TSER+ 12 TSER– 13 Path Overhead PMC-Sierra ...

Page 2

... When LOOP is LOW, the Transmit input data stream (TSER±) is used by the Receive PLL for clock and data recovery. Document #: 38-02018 Rev. *B and RIN– left unconnected, the entire Receive PLL will be powered down. CC and TSER– CY7B952 . Page [+] Feedback ...

Page 3

... CC V Ground. SS Description The CY7B952 Serial SONET/SDH Transceiver (SST) is used in SONET/SDH and ATM applications to recover clock and data information from a 155.52-MHz or 51.84-MHz NRZ (Non Return to Zero) or NRZI (Non Return to Zero Invert on ones) serial data stream. This device also provides a bit-rate ...

Page 4

... SONET/SDH system such as a SONET/SDH switch. The SST provides the recovered clock and data to a serial to parallel converter and SONET/SDH Transport Overhead Processor such as the PMC-Sierra PM5343 STXC. The parallel data is then passed to a SONET/SDH Path Overhead Processor such as the PMC-Sierra PM5344 SPTX. CY7B952 . CC Page [+] Feedback ...

Page 5

... TSER/RIN IHE(MAX) REFCLK/ ILE(MIN) TSER/RIN ILE(MIN) TSER/RIN REFCLK TSER/RIN REFCLK CD TSER/RIN REFCLK CD (ECL) CD (Disable) T > 0°C /2. CC CY7B952 [ ± 10% 0°C to +70°C Min. Max. Unit 2 −0.5 0.8 V µA +0.5 +200 −10 µA +10 −50 µA +50 −500 µA 2 ...

Page 6

... V ILE < < (d) ECL Input Test Waveform Description MODE=LOW MODE=HIGH MODE=LOW MODE=HIGH [6] [6] [ where x represents the number of ECL output pairs activated. CCT CCE CY7B952 Min. Max. Unit − 0. − 0.0 0. ...

Page 7

... Jitter Generation of RX PLL −3 dB Gain Bandwidth of RX PLL f −3dB (Jitter Transfer Bandwidth) −3 dB Gain Bandwidth of RX PLL f −3dB (Jitter Transfer Bandwidth) Gpeak Maximum Peaking of RX PLL Switching Waveforms for the CY7B952 SONET/SDH Serial Transceiver t RPWL REFCLK TSER (RIN ) t PD TOUT (ROUT ) t ...

Page 8

... SUNI is a trademark of PMC-Sierra, Incorporated. SST is a trademark of Cypress Semiconductor Corporation. All product and company names mentioned in this document are trademarks of their respective holders. Document #: 38-02018 Rev. *B Package Name Package Type S13 24-Lead (300-Mil) Molded SOIC 24-Lead (300-Mil) Molded SOIC S13 CY7B952 Operating Range Commercial Page [+] Feedback ...

Page 9

... Document History Page Document Title: CY7B952 SST™ SONET/SDH Serial Transceiver Document Number: 38-02018 Orig. of REV. ECN. Issue Date Change ** 105981 03/28/01 *A 122206 12/28/02 *B 283371 See ECN Document #: 38-02018 Rev. *B Description of Change SZV Change from Spec. number: 38-00502 to 38-02018 RBI Add power up requirements to maximum ratings information. ...

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