cy7b9331 Cypress Semiconductor Corporation., cy7b9331 Datasheet

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cy7b9331

Manufacturer Part Number
cy7b9331
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
Features
Functional Description
The CY7B9331 HOTLink OLC Receiver is a point-to-point
communications building block that receives data over
high-speed serial links (fiber, coax, and twisted pair) at 160 to
Cypress Semiconductor Corporation
• Fibre Channel compliant
• IBM ESCON™ compliant
• OLC Compatible system interface
• 8B/10B-coded or 10-bit unencoded
• 160- to 330-Mbps data rate
• No external PLL components
• Dual ECL 100K serial inputs
• Low power: 650 mW
• Compatible with fiberoptic modules, coaxial cable, and
• Built-In Self-Test
• 28-pin SOIC/PLCC
HOTLink is a trademark of Cypress Semiconductor Corporation.
ESCON is a registered trademark of IBM.
Receiver Logic Block Diagram
INB(INB+)
twisted pair media
SI(INB )
ENSYNC
REFCLK
STATUS
BISTEN
MODE
LOOP
INA+
INA
LOGIC
TEST
ECL
TTL
CLOCK
SYNC
CLK0
DATA
SYNC
3901 North First Street
(Q
DECODER
DECODER
REGISTER
REGISTER
PRELIMINARY
SHIFTER
FRAMER
OUTPUT
Q
b
0 7
h
)
SC/D (Q
330 Mbits/second. The HOTLink OLC Receiver system inter-
face has been tailored to match OLC (Optical Link Card) timing
and functionality.
The HOTLink receiver accepts the serial bit stream at its dif-
ferential line receiver inputs and, using a completely integrated
PLL clock synchronizer, recovers the timing information nec-
essary for data reconstruction.
The bit stream is deserialized, decoded, and checked for
transmission errors. The recovered byte is presented in paral-
lel to the receiving host along with a byte rate clock.
The 8B/10B encoder/decoder can be disabled in systems that
already encode or scramble the transmitted data. A Built-In
Self-Test pattern generator and checker allows testing of the
transmitter, receiver, and the connecting link as a part of a
system diagnostic check.
The CY7B9331 HOTLink Receiver is a companion part to the
CY7B923 HOTLink Transmitter. The HOTLink chip set pro-
vides a complete physical interface solution. For further infor-
mation on HOTLink Transceiver and Receiver functions see
the CY7B923/933 datasheet.
RVS(Q
a
)
B9331–1
j
)
HOTLink™ OLC Receiver
San Jose
ENSYNC
RVS (Q
BISTEN
(Q
(Q
(Q
(Q
LOOP
SYNC
ENSYNC
INA
INA+
V
RVS(Q
h
GND
GND
g
f
i
(Q
) Q
) Q
) Q
CCN
)Q
SYNC
V
h
GND
GND
7
6
5
4
) Q
CCN
Pin Configurations
j
)
j
7
)
5
6
7
8
9
10
11
CA 95134
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1213
Top View
4 3
Top View
SOIC
PLCC
7B9331
14
7B9331
2
15
1
16
28
1718
2726
28
27
26
25
24
23
22
21
20
19
18
17
16
15
25
24
23
22
21
20
19
CY7B9331
INB(INB+)
SI(INB )
MODE
REFCLK
V
STATUS
CLK0
V
GND
SC/D(Q
Q
Q
Q
Q
REFCLK
V
STATUS
CLK0
V
GND
SC/D (Q
CCQ
CCQ
CCQ
CCQ
0
1
2
3
408-943-2600
B9331–3
(Q
(Q
(Q
(Q
B9331–2
b
c
d
e
)
April 1994
)
)
)
a
a
)
)

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cy7b9331 Summary of contents

Page 1

... Self-Test pattern generator and checker allows testing of the transmitter, receiver, and the connecting link as a part of a system diagnostic check. The CY7B9331 HOTLink Receiver is a companion part to the CY7B923 HOTLink Transmitter. The HOTLink chip set pro- vides a complete physical interface solution. For further infor- mation on HOTLink Transceiver and Receiver functions see the CY7B923/933 datasheet ...

Page 2

... CY7B9331 HOTLink Receiver Pin Description Name I/O Description Q TTL Out Q Parallel Data Output 0 chronously with Clk0. When MODE is HIGH SC/D(Q ) TTL Out Special Character/Data Select. SC/D indicates the context of received data. HIGH indicates a Control a (Special Character) code, LOW indicates a Data character. When MODE is HIGH, SC/D acts as Q output ...

Page 3

... CY7B9331 HOTLink Receiver Pin Description (continued) Name I/O Description BISTEN TTL In Built-In Self-Test Enable. When BISTEN is LOW the receiver awaits a D0.0 (sent once per BIST loop) character and begins a continuous test sequence that tests the functionality of the transmitter, the receiver, and the link connecting them. In BIST mode the status of the test can be monitored with Sync and RVS outputs ...

Page 4

... V CCR 5V R1 OUTPUT R2 [6] (a) TTL AC Test Load V IHE 2.0V 1.0V 20% V ILE < < B9331–4 (d) ECL InputTest Waveform Over the Operating Range Description 4 CY7B9331 Min. Max. Typ. Max. 130 150 Max =5.0V, T =25 C, RF=LOW, BISTEN=LOW IHE 80% 80% 20% V ILE < ...

Page 5

... Switching Waveforms for the CY7B9331 HOTLink Receiver t CPRH CLK0 SYNC SC/D,RVS t CPXL [11] REFCLK SI [12] NOTE STATUS Notes: 6. Tested initially and after any design or process changes that may affect these parameters, but not 100% tested. 7. The period of t will match the period of the transmitter (CY7B923) CKW when the receiver is receiving serial data. When data is interrupted, Clk0 may CKR drift to one of the range limits above ...

Page 6

... Ordering Informatio Package Ordering Code Name CY7B9331 JC J64 28-Lead Plastic Leaded Chip Carrier CY7B9331 SC S21 28-Lead (300-Mil) SOIC Document #: 38-00359 PRELIMINARY Operating Package Type Commercial 6 CY7B9331 Range ...

Page 7

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. PRELIMINARY 28-Lead Plastic Leaded Chip Carrier J64 28–Lead (300-Mil) Molded SOIC S21 CY7B9331 ...

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