cy7b9334 Cypress Semiconductor Corporation., cy7b9334 Datasheet
cy7b9334
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cy7b9334 Summary of contents
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... Built-In Self-Test • Single +5V supply • 28-pin PLCC • 0.8µ BiCMOS Functional Description ® The CY7B9234 SMPTE HOTLink CY7B9334 SMPTE HOTLink Receiver bolt on to the SMPTE Scrambler Controller (CY7C9235) CY7B9234 Transmitter Logic Block Diagram SC 0− − ...
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... ENA may be held HIGH/LOW continuously or it may be pulsed with each data byte to be sent. If ENA is being used for data control, ENN will normally be strapped HIGH, but can be used for BIST function control. Document #: 38-02014 Rev. *A SERIAL LINK CY7B9334 Receiver Pin Configuration FOTO RF ENN GND ...
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... HIGH for all but the last byte of a test loop. RP will pulse LOW one byte time per BIST loop. V Power for output drivers. CCN V Power for internal circuitry. CCQ GND Ground. Pin Description CY7B9334 SMPTE HOTLink Receiver Name I/O Description Q TTL Out Q Parallel Data Output. Q 0−7 0−7 ...
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... Pin Description CY7B9334 SMPTE HOTLink Receiver (continued) Name I/O Description RVS (Q ) TTL Out Received Violation Symbol. A HIGH on RVS indicates that a code rule violation has been detected in j the received data stream. A LOW shows that no error has been detected. In BIST mode, a LOW on RVS indicates correct operation of the Transmitter, Receiver, and link on a byte-by-byte basis. When ...
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... Test logic is discussed in more detail in the CY7B9234 SMPTE HOTLink Transmitter Operating Mode Description. CY7B9334 SMPTE HOTLink Receiver Block Diagram Description Serial Data Inputs a Two pairs of differential line receivers are the inputs for the serial data stream. INA± ...
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... Test logic includes the initialization and control for the Built-In Self-Test (BIST) generator, the multiplexer for Test mode clock distribution, and control logic for the decoder. Test logic is discussed in more detail in the CY7B9334 SMPTE HOTLink Receiver Operating Mode Description. CY7B9234 CY7B9334 − ...
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... TTL OUTs, CY7B9234: RP; CY7B9334 Output HIGH Voltage OHT V Output LOW Voltage OLT I Output Short Circuit Current OST TTL INs, CY7B9234 SC/D, SVS, ENA, ENN, CKW, FOTO, BISTEN; CY7B9334: RF, REFCLK, BISTEN 0−7 V Input HIGH Voltage IHT V Input LOW Voltage ILT I Input HIGH Current IHT ...
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... CY7B9234/CY7B9334 Electrical Characteristics Parameter Description Differential Line Receiver Input Pins: INA+, INA−, INB+, INB− V Input Differential Voltage DIFF |(IN+) − (IN−)| V Highest Input HIGH Voltage IHH V Lowest Input LOW Voltage ILL I Input HIGH Current IHH [4] I Input LOW Current ILL ...
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... pF. L −2.0V, over the operating range. CC /10 if data is being received. See note. CKW , SC/D, and RVS) are loaded with similar DC and AC loads. 0−7 , and V specification (approximately CY7B9234 CY7B9334 7B9234-270 7B9234-400 Min. Max Min. Max Unit −3 − −3 − ...
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... BISTEN RP t CPWL CKW t SD ENN D – SC/D, SVS, BISTEN Document #: 38-02014 Rev CKW t CPWH t CPWL t SENP t t HENP SD VALID DATA PDF t PDR t PPWH t CKW t CPWH t HD VALID DATA t SD CY7B9234 CY7B9334 DISABLED ENABLED t HD Page [+] Feedback ...
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... Switching Waveforms for the CY7B9334 SMPTE HOTLink Receiver t CPRH CKR t PRH RDY − SC/D,RVS, t CPXL REFCLK NOTE 20 SO Static Alignment t /2− ± INA , ± INB SAMPLE WINDOW Document #: 38-02014 Rev CKR t CPRL ...
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... A more complete description is found in the section “CY7B9234 SMPTE HOTLink Transmitter Operating Mode Description.” Figure 3 illustrates the data flow through the SMPTE HOTLink CY7B9334 receiver pipeline. Serial data is sampled by the receiver on the INx± inputs. The receiver PLL locks onto the Document #: 38-02014 Rev. *A − 10ns ...
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... SERIAL DATA IN ± INX DATA CKR Q0−7, DATA SC/D, RVS RDY RDY IS LOW FOR DATA Figure 3. CY7B9334 Receiver Data Pipeline in Encoded Mode RF LATCHED ON FALLING EDGE OF CKR CKR RF Q0−7, SC/D, DATA DATA DATA RVS RDY IS HIGH WHILE WAITING FOR K28.5 RDY Figure 4. CY7B9334 Framing Operation in Encoded Mode ...
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... D ,SC/D ENN CKW 0 − 7 SMPTE HOTLink TRANSMITTER SMPTE HOTLink RECEIVER Q ,SC/D CKR 0 − CKW 0 − 8 Figure 5. Seamless FIFO Interface CY7B9234 CY7B9334 = 111 00000 and 7−0 CLOCKED FIFO 7C44X/ − ,SC/D 0 − 7 7B9234 7B9334 RDY Q ,SC/D 0 − ENW D 0 − ...
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... Transmitter, the Receiver, and the link connecting them. This mode is available with minimal impact on user system logic, and can be used as part of the normal system diagnostics. Typical connections and timing are shown in Figure 7. CY7B9234 CY7B9334 Page [+] Feedback ...
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... VCC IB IB– IA IA– 82 .01UF Fiber-optic 8 20 PECL Load CY7B9234 CY7B9334 .01UF VCC Fiber-optic Fiber Tx TX TX+ TX– GND Coax or Twisted Pair A B 270 270 .01UF 649 1500 RL/2 Coax or Twisted Pair RL/2 Optional Signal Det. 270 ...
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... RVS output in the Receiver. This can be done by explicitly sending a violation with the SVS input, or allowing the trans- mitter BIST loop to run while the Receiver runs in normal mode. The BIST loop includes deliberate violation symbols and will adequately test the RVS function. CY7B9234 CY7B9334 OUTA OUTB OUTC SO DON'T CARE ...
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... LOW,” which can be ignored while the test system creates a differential input signal at some higher voltage. CY7B9334 SMPTE HOTLink Receiver Operating Mode Description In normal user operation, the Receiver can operate in either of two modes. The Encoded mode allows a user system to send Document #: 38-02014 Rev ...
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... Receiver Test Mode Description The CY7B9334 Receiver offers two types of test mode operation, BIST mode and Test mode normal system application, the Built-In Self-Test (BIST) mode can be used to check the functionality of the Transmitter, the Receiver and the link connecting them ...
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... F and f, G and g, and H and h. Bits i and j are derived, respectively, from (A,B,C,D,E) and (F,G,H). The bit labeled A in the description of the 8B/10B Transmission Code corresponds to bit 0 in the numbering scheme of the FC-2 specification, B corresponds to bit 1, as shown below CY7B9234 CY7B9334 , 0-7 FC-2 45 Bits: 7654 3210 0100 0101 Page [+] Feedback ...
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... Otherwise, running disparity at the end of the sub-block is the same as at the beginning of the sub-block. CY7B9234 CY7B9334 Page [+] Feedback ...
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... CY7B9234 CY7B9334 Data OUT 765 43210 Hex Value 000 00000 00 000 00001 01 000 00010 ...
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... Code Rule Violation and SVS Tx Pattern 111 00000 100111 1000 111 00001 001111 1010 111 00010 110000 0101 Running Disparity Violation Pattern 111 00100 110111 0101 CY7B9234 CY7B9334 Current RD+ abcdei fghj 110000 1011 110000 0110 110000 1010 110000 1100 110000 1101 110000 0101 110000 1001 110000 ...
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... Plastic Leaded Chip Carrier J64 28-Lead Plastic Leaded Chip Carrier 28-Lead Plastic Leaded Chip Carrier J64 SEATING PLANE 26 25 0.045 0.055 19 0.026 0.032 18 CY7B9234 CY7B9334 Operating Range Commercial Commercial Operating Range Commercial Commercial DIMENSIONS IN INCHES MIN. MAX. 0.013 0.021 0.390 ...
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... Document History Page Document Title:CY7B9234/CY7B9334 SMPTE HOTLink Document Number: 38-02014 REV. ECN NO. Issue Date ** 105852 03/28/01 *A 282669 See ECN Document #: 38-02014 Rev. *A ® Transmitter/Receiver Orig. of Change Description of Change SZV Change from Spec number: 38-00629 to 38-02014 BCD Removed data rate 177 Mbps and the corressponding video standard ...