cy7b9945v Cypress Semiconductor Corporation., cy7b9945v Datasheet
cy7b9945v
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cy7b9945v Summary of contents
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... Integrated phase-locked loop (PLL) with lock indicator • Low cycle-cycle jitter (<100 ps peak-peak) • 3.3V operation • Industrial temperature range: –40°C to +85°C • 52-pin 1.4-mm TQFP package Functional Description The CY7B9945V high-speed multi-phase PLL clock buffer offers user-selectable control over system clock functions. Block Diagram FS 3 REFA+ ...
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... LOW, the clock outputs will disable to HOLD-OFF mode. When in MID, the device will enter factory test mode. PWR Power Supply for the Output Buffers PWR Power Supply for the Internal Circuitry PWR Device Ground RoboClock CY7B9945V Description Divide Ratios. The NOM Page [+] Feedback ...
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... The FS control pin setting determines the nominal operational frequency range of the divide by one output (f device directly related to the VCO frequency. The FS NOM setting for the device is shown in Table 1. For CY7B9945V, the upper f range extends from 96 MHz to 200 MHz. NOM Table 1. Frequency Range Select ...
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... FB connected to an output selected for “Zero” skew (i.e., FBF0 = MID or XF[1:0] = MID). Document #: 38-07336 Rev. *E RoboClock CY7B9945V [3] outputs are driven to a logic LOW state on their falling edges. This ensures the output clocks are stopped without a glitch. When a bank of outputs is disabled to HI-Z state, the respective bank of outputs will go HI-Z immediately ...
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... The states will depend Document #: 38-07336 Rev. *E RoboClock CY7B9945V on the configurations of the divide, skew and frequency selection. All clock outputs will stay in High-Z mode and all FSMs will stay in the deterministic state until DIS2 is deasserted, which will cause the device to reenter factory test mode ...
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... GND IN [ Max MAX V = Max LOAD pF 50Ω LOAD CC f MAX = 200 MHz) and the other output bank to run at half NOM RoboClock CY7B9945V V CC ° 3.3V ±10% C ° 3.3V ±10 +85 C Min. Max. Unit 2.4 – V 2.4 – V – 0.5 V – ...
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... Description [12, 13] [12, 13] and SKEW0 [14, 15] [16] [5] [5] [11] [19] [19] [20] [12, 21] [21, 22] RoboClock CY7B9945V Min. Max. Unit – CY7B9945V-2 CY7B9945V-5 Min. Max. Min. Max. Unit 24 200 24 200 MHz 24 200 24 200 MHz – 200 – 200 ps – 250 – 250 ps – ...
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... MHz 200 MHz. L Package Name A52 52-lead Thin Quad Flat Pack A52 52-lead Thin Quad Flat Pack A52 52-lead Thin Quad Flat Pack A52 52-lead Thin Quad Flat Pack RoboClock CY7B9945V 3. 0.8V < [1:2]Q[0,2] t SKEWPR [1:2]Q[1,3] ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. RoboClock CY7B9945V 51-85131-** Page [+] Feedback ...
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... Document History Page Document Title: CY7B9945V RoboClock Document Number: 38-07336 Issue Orig. of REV. ECN NO. Date Change ** 111747 03/04/02 CTK *A 116572 09/05/02 HWT *B 119078 10/16/02 HWT *C 124645 03/20/03 RGL *D 128464 07/25/03 RGL *E 272075 See ECN RGL Document #: 38-07336 Rev. *E High-speed Multi-phase PLL Clock Buffer Description of Change ...