w83193r-01 Winbond Electronics Corp America, w83193r-01 Datasheet
w83193r-01
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w83193r-01 Summary of contents
Page 1
... The W83193R-02/-04 also provides I disable each clock outputs and choose the 0.6% or 1.5% center type spread spectrum. The W83193R-01 accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply. High drive PCI and SDRAM CLOCK outputs typically provide greater than 1 V /ns slew rate into 30 pF loads. CPU CLOCK outputs typically provide better than 1 V /ns slew rate into 20 pF loads as maintaining 50 ¡ ...
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... Vss Vss W83193R-01 PRELIMINARY REF[0:1] IOAPIC CPUCLK[0:3] SDRAM[0:11] PCICLK[0:5] PCICLK_F 48MHz 24MHz Vddq2 IOAPIC REF1/CPU_STOP# Vss CPUCLK0 CPUCLK1 Vddq2 CPUCLK2 CPUCLK3 Vss SDRAM 0 SDRAM 1 Vddq3 SDRAM 2 SDRAM 3 Vss SDRAM 4 SDRAM 5 ...
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... CPU, SDRAM and PCI clocks. PCI clock during normal operation. 10 I/O Latched input for FTS at initial power up for H/W selecting the output frequency of CPU, SDRAM and PCI clocks. PCI clock during normal operation W83193R-01 PRELIMINARY FUNCTION FUNCTION Publication Release Date: May 1998 Revision 0.20 ...
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... I/O Internal 250k Latched input for FS0 at initial power up for H/W selecting the output frequency of CPU, SDRAM and PCI clocks. 48MHz output for USB during normal operation W83193R-01 PRELIMINARY FUNCTION pull-up. FUNCTION 2 C 2-wire control interface with internal 2 C 2-wire control interface with FUNCTION pull-up buffered output of the crystal ...
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... Power supply for SDRAM, PCICLK and 48/24MHz outputs. Circuit Ground. 33,39,45 FTS = 1 (MHz) FTS = 0 (MHz) CPU PCI CPU 61.8 30.9 62 83.3 33.3 85.8 68.5 34.25 69.5 55 27.5 83 66.8 33 W83193R-01 PRELIMINARY FUNCTION REF,IOAPIC (MHz) PCI 31.2 14.318 39 14.318 42.8 14.318 34.74 14.318 41.7 14.318 32 14.318 40 14.318 25 14.318 Publication Release Date: May 1998 Revision 0.20 ...
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... The W83193R-01 may be disabled in the low state according to the following table in order to reduce power consumption. All clocks are stopped in the low state, but maintain a valid high period on transitions from running to stop ...
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... Selection by software I C Reserved Bit1 Bit0 1 1 Tri-state all outputs 1 0 0.6% Spread Spectrum 0 1 1.5% Spread Spectrum 0 0 Normal Outputs PCI SDRAM Hi-Z Hi-Z see table CPU - 7 - W83193R-01 PRELIMINARY Byte0,1,2... Ack until Stop REF IOAPIC Hi-Z Hi-Z 14.318 14.318 Publication Release Date: May 1998 ...
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... PCICLK2 (Active / Inactive) PCICLk1/FTS (Active / Inactive) PCICLK0 / FS2 (Active / Inactive) Description SDRAM7 (Active / Inactive) SDRAM6 (Active / Inactive) SDRAM5 (Active / Inactive) SDRAM4 (Active / Inactive) SDRAM3 (Active / Inactive) SDRAM2 (Active / Inactive) SDRAM1 (Active / Inactive) SDRAM0 (Active / Inactive W83193R-01 PRELIMINARY Publication Release Date: May 1998 Revision 0.20 ...
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... SDRAM10 (Active / Inactive) SDRAM9 (Active / Inactive) SDRAM8 (Active / Inactive) Description Reserved Reserved Reserved IOAPIC (Active / Inactive) Reserved Reserved REF1 / CPU_STOP# (Active / Inactive) REF0 (Active / Inactive) Description Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved - 9 - W83193R-01 PRELIMINARY Publication Release Date: May 1998 Revision 0.20 ...
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... JA BW 500 J 0.4 1.6 t TLH t THL V 0.7 1.5 over V 0.7 2.1 RBE - 10 - W83193R-01 PRELIMINARY Rating - 0 7 150 125 Units Test Conditions % Measured at 1. Load Measured at 1. Load Measured at 1. KHz Load on CPU and PCI outputs ...
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... Ioz 10 I dd3 I dd2 CPUS3 CPUS2 I PD3 - 11 - W83193R-01 PRELIMINARY Units Test Conditions All outputs V dc All outputs using 3.3V power CPU = 66.6 MHz PCI = 33.3 Mhz with load mA Same as above mA Same as above mA Same as above ...
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... Max -27 OH(min) -27 OH(max) I OL(min OL(max) 0.4 RF(min) 1.6 RF(max) Min Typ Max -29 OL(min) 28 OL(max) 0.4 RF(min) 1.8 RF(max W83193R-01 PRELIMINARY Units Test Conditions mA Vout = 1 Vout = 2.0V mA Vout = 1 Vout = 0 Load Load Units Test Conditions mA Vout = 1 Vout = 2.7V mA Vout = 1 Vout = 0 ...
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... Min Typ Max -46 OL(min) 53 OL(max) 0.5 RF(min) 1.3 RF(max) Min Typ Max -33 -33 30 OL(min) 38 OL(max) 0.5 RF(min) 2.0 RF(max W83193R-01 PRELIMINARY Units Test Conditions mA Vout = 1 Vout = 3.135V mA Vout = 1. Vout = 0 Load Load Units Test Conditions mA Vout = 1.65V mA Vout = 3.135V mA Vout = 1. Vout = 0 ...
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... PCI clocks are stopped. The PCI clocks will always be stopped in a low state and resume output with full pulse width. In this case, PCI “c locks on latency “ is less than 1 PCI clocks and “c locks off latency ” is less then 1 PCI clocks W83193R-01 PRELIMINARY Publication Release Date: May 1998 Revision 0.20 ...
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... These capacitor has typical values ranging from 4.7pF to 22pF . 2.5V Output Output pull-low tri-state Within 3ms Input Output Output Output pull-low tri-state @3.3V ) inside. The default state will be logic - 15 - W83193R-01 PRELIMINARY Vdd resistor is recommended to be the series Publication Release Date: May 1998 Revision 0.20 ...
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... Terminating Resistor Device Pin 10k Ground Programming Header Vdd Pad Ground Pad Series 10k Terminating Resistor Device Pin - 16 - W83193R-01 PRELIMINARY Clock Trace EMI Reducing Cap Optional Ground Clock Trace EMI Reducing Cap Optional Ground Publication Release Date: May 1998 Revision 0.20 ...
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... Vdd2 Plane Publication Release Date: May 1998 - 17 - W83193R-01 PRELIMINARY FB2 Vdd2 (3.3Vor2.5V) C21 C2 C22 C36 C35 Revision 0.20 ...
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... W83193R-01 13.0 HOW TO READ THE TOP MARKING W83193R-01 28051234 814GBB 1st line: Winbond logo and the type number: W83193R-01 2nd line: Tracking code 2 8051234 2: wafers manufactured in Winbond FAB 2 8051234: wafer production series lot number 3rd line: Tracking code 814 814: packages made in '98, week 14 G: assembly house ID ...
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... Winbond Electronics (H.K.) Ltd. Rm. 803, World Trade Square, Tower II 123 Hoi Bun Rd., Kwun Tong Kowloon, Hong Kong TEL: 852-27516023-7 FAX: 852-27552064 Publication Release Date: May 1998 - 19 - W83193R-01 PRELIMINARY Winbond Electronics (North America) Corp. 2730 Orchard Parkway San Jose, CA 95134 U.S.A. TEL: 1-408-9436666 FAX: 1-408-9436668 ...