w83194r-630a Winbond Electronics Corp America, w83194r-630a Datasheet - Page 4

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w83194r-630a

Manufacturer Part Number
w83194r-630a
Description
166mhz Clock For Sis Chipset
Manufacturer
Winbond Electronics Corp America
Datasheet
PCICLK 1/ *FS2
PCICLK 2/ *MODE
PCICLK [ 3:6 ]
5.3 I
*SDATA
*SDCLK
5.4 Fixed Frequency Outputs
REF0X2 / *FS3
REF1
24_48MHz/
SEL2.5_3.3#
48MHz / *FS0
2
C Control Interface
SYMBOL
SYMBOL
11,12,13,14
PIN
PIN
23
24
48
25
26
8
9
2
OUT
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
- 4 -
PCI free-running clock during normal operation.
Latched input for FS2 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
PCI clock during normal operation.
Latched input for MODE at initial power up for input
selection of CPU_STOP#, PCI_STOP# and PD#.
When MODE=1, the above pins are SDRAM clock
outputs. When MODE=0, the pins are inputs ACPI
pins.
PCI clock during normal operation.
Low skew (< 250ps) PCI clock outputs.
Serial data of I
Serial clock of I
3.3V, 14.318MHz reference clock output .
Internal 250k
Latched input for FS3 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
3.3V , 14.318MHz reference clock output.
SEL2.5_3.3# controls the Vdd of CPU. If logic 0 at
power on, VddLCPU=3.3V. If logic 1, VddLCPU=2.5
24MHz or 48MHz selected by I2C for Super I/O.
Internal 250k
Latched input for FS0 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks. 48MHz output for USB during normal
operation.
2
pull-up.
pull-up.
C 2-wire control interface
2
C 2-wire control interface
Publication Release Date: Nov. 1999
FUNCTION
FUNCTION
W83194R-630A
PRELIMINARY
Revision 0.65

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