w83194r-630a Winbond Electronics Corp America, w83194r-630a Datasheet - Page 3

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w83194r-630a

Manufacturer Part Number
w83194r-630a
Description
166mhz Clock For Sis Chipset
Manufacturer
Winbond Electronics Corp America
Datasheet
5. PIN DESCRIPTION
IN - Input
OUT - Output
I/O - Bi-directional Pin
# - Active Low
* - Internal 250k
5.1 Crystal I/O
Xin
Xout
5.2 CPU, SDRAM, PCI Clock Outputs
CPUCLK_F
CPUCLK [ 0:1 ]
SDRAM_F
SDRAM0/CPU_STOP#
SDRAM1/PCI_STOP#
SDRAM2/PD#
SDRAM[3:12]
PCICLK_F/ *FS1
SYMBOL
SYMBOL
pull-up
21,28,29,31,32
,34,35,37,38,
45,43
PIN
PIN
46
40
17
18
20
41
4
5
7
OUT
OUT
OUT
OUT
OUT
I/O
I/O
I/O
I/O
I/O
I/O
IN
- 3 -
Crystal input with internal loading capacitors and
feedback resistors.
Crystal output at 14.318MHz nominally.
Low skew (< 250ps) clock outputs for host
frequencies such as CPU, Chipset and Cache.
VddLCPU is the supply voltage for these outputs.
This pin will not be stopped by CPU_STOP#
Low skew (< 250ps) clock outputs for host
frequencies such as CPU, Chipset and Cache.
VddLCPU is the supply voltage for these outputs.
SDRAM clock outputs which have syn. or asyn.
frequencies as CPU clocks.
This pin will not be stopped by CPU_STOP#
SDRAM clock outputs which have syn. or asyn.
frequencies as CPU clocks.
CPU_STOP# input pin when MODE=0.
SDRAM clock outputs which have syn. or asyn.
frequencies as CPU clocks.
PCI_STOP# input pin when MODE=0.
SDRAM clock outputs which have syn. or asyn.
frequencies as CPU clocks.
PD# input pin when MODE=0.
SDRAM clock outputs which have syn. or asyn.
frequencies as CPU clocks.
Latched input for FS1 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
Publication Release Date: Nov. 1999
FUNCTION
FUNCTION
W83194R-630A
PRELIMINARY
Revision 0.65

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