w83194br-619 Winbond Electronics Corp America, w83194br-619 Datasheet - Page 13

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w83194br-619

Manufacturer Part Number
w83194br-619
Description
Winbond Clock Generator For Intel P4 Springdale Series Chipset P4 Springdale Series Chipset
Manufacturer
Winbond Electronics Corp America
Datasheet
7.3
7.4
7.5
BIT
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Register 2: PCI Clock Register (1 = Enable, 0 = Disable) (Default =FFH)
Register 3: PCI, 3V66 Clock Register (1 = Enable, 0 = Disable) (Default =EFH)
Register 4: 24_48MHz, REF Control Register (1 = Enable, 0 = Disable) (Default
=FCH)
CLOCK GEN. FOR INTEL P4 SPRINGDALE/PRESCOTT SERIES CHIPSET
24_48MHz
VCH_EN
PCI_F2
PCI_F1
PCI_F0
3V66_3
3V66_2
3V66_1
3V66_0
Reserve
Reserve
MODE1
MODE0
NAME
PCI_7
PCI_6
PCI_5
PCI_4
PCI_3
NAME
PCI_2
PCI_1
PCI_0
48MHZ
NAME
REF1
REF0
PWD
PWD
PWD
1
1
1
1
1
1
0
0
1
1
1
1
1
1
1
X
1
1
1
1
1
1
1
1
Pin 22 24_48MHz output control
Pin 23 48MHz output control
Reserved
Reserved
Pin 2 REF1 output control
Pin 1 REF0 output control
Clock output mode selection
Refer to Table-1
Pin 10 PCI_F2 output control
Pin 9 PCI_F1 output control
Pin 8 PCI_F0 output control
Pin 21 PCICLK7 output control
Pin 20 PCICLK6 output control
Pin 19 PCICLK5 output control
Pin 16 PCICLK4 output control
Pin 15 PCICLK3 output control
Pin 14 PCICLK2 output control
Pin 13 PCICLK1 output control
Pin 12 PCICLK0 output control
Pin 26 3V66_3 / VCH output select
1: VCH output, 0: 3V66 output (Default)
Pin 26 3V66_3 / VCH output control
Pin 27 3V66_2 output control
Pin 30 3V66_1 output control
Pin 31 3V66_0 output control
W83194BR-619/W83194BG-619
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DESCRIPTION
DESCRIPTION
DESCRIPTION
Publication Release Date: March, 2006
Revision 0.7

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