lmx2515 National Semiconductor Corporation, lmx2515 Datasheet

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lmx2515

Manufacturer Part Number
lmx2515
Description
Pllatinum? Frequency Synthesizer System With Integrated Vco
Manufacturer
National Semiconductor Corporation
Datasheet
© 2004 National Semiconductor Corporation
LMX2515
PLLatinum
with Integrated VCO
General Description
LMX2515 is a highly integrated, high performance, low
power frequency synthesizer system optimized for Japan
PDC mobile handsets. Using a proprietary digital phase
locked loop technique, LMX2515 generates very stable, low
noise local oscillator signals for up and down conversion in
wireless communications devices.
LMX2515 includes a voltage controlled oscillator (VCO), a
loop filter, and a fractional-N RF PLL based on a delta sigma
modulator. In concert these blocks form a closed loop RF
synthesizer system. The LMX2515LQ0701 supports the Ja-
pan PDC800 band and the LMX2515LQ1321 supports Ja-
pan PDC1500 band.
Serial data is transferred to the device via a three-wire
MICROWIRE interface (DATA, LE, CLK).
Operating supply voltage ranges from 2.5 V to 3.3 V.
LMX2515 features low current consumption.
LMX2515 is available in a 28-pin leadless leadframe pack-
age (LLP).
Functional Block Diagram
FastLock
TRI-STATE
PLLatinum
®
is a trademark of National Semiconductor Corporation.
is a registered trademark of National Semiconductor Corporation.
is a trademark of National Semiconductor Corporation.
Frequency Synthesizer System
DS200688
Features
n Small size
n RF Synthesizer System
n Supports Various Reference Frequencies
n Fast Lock Time: 300 µs
n Low Current Consumption
n 2.5 V to 3.3 V operation
n Digital Filtered Lock Detect Output
n Hardware and Software Power Down Control
Applications
n Japan PDC systems at 800 MHz frequency band.
n Japan PDC systems at 1500 MHz frequency band.
5.0 mm X 5.0 mm X 0.75 mm 28-Pin LLP Package
Integrated RF VCO
Integrated Loop Filter
Low Spurious, Low Phase Noise Fractional-N RF PLL
Based on 10-Bit Delta Sigma Modulator
Frequency Resolution Down to 20 kHz
12.6/14.4/25.2/26.0 MHz
20068807
www.national.com
April 2004

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lmx2515 Summary of contents

Page 1

... PDC1500 band. Serial data is transferred to the device via a three-wire MICROWIRE interface (DATA, LE, CLK). Operating supply voltage ranges from 2 3.3 V. LMX2515 features low current consumption. LMX2515 is available in a 28-pin leadless leadframe pack- age (LLP). Functional Block Diagram FastLock ™ trademark of National Semiconductor Corporation. ...

Page 2

... Do not connect to any node on the printed circuit board. V — Supply voltage for RF analog circuitry DD NC — Do not connect to any node on the printed circuit board. RFout O RF VCO output for LMX2515LQ1321 V — Supply voltage for RF analog circuitry DD RFout O RF VCO output for LMX2515LQ0701 NC — ...

Page 3

... LMX2515LQ0701 LMX2515LQ1321 Ordering Information Order Part Number RF Min. (MHz) LMX2515LQX0701 633.15 LMX2515LQ0701 633.15 LMX2515LQX1321 1270.22 LMX2515LQ1321 1270.22 Part Number Description Name I/O Description CLK I MICROWIRE Clock CE I Chip enable control pin GND — Ground for digital circuitry LD O ...

Page 4

... Typical Application Circuit Note 1: Refer to LMX2515LQ0701 Tuning Range vs. External Inductance plot to aid in selecting the appropriate external inductance, PCB trace and L1, for the desired frequency range. Note 2: No external inductance required. www.national.com LMX2515LQ0701 Application Circuit (Note 1) LMX2515LQ1321 Application Circuit (Note 2) 4 20068804 ...

Page 5

... DD LMX2515LQ1321 Power Down Current REFERENCE OSCILLATOR PARAMETERS f Reference Oscillator Input Frequency OSCin (Note 6) V Reference Oscillator Input Sensitivity OSCin RF VCO f Frequency Range LMX2515LQ0701 RFout LMX2515LQ1321 P Output Power LMX2515LQ0701 RFout LMX2515LQ1321 Lock Time RMS Phase Error Recommended Operating (Notes 3, 4, Conditions Parameter ...

Page 6

Electrical Characteristics ˚C; Limits in boldface type apply over the operating temperature range from -20 ˚C ≤ noted.) (Continued) Symbol Parameter RF VCO L(f) Phase Noise in Normal Mode. RFout 2nd Harmonic Suppression 3rd Harmonic ...

Page 7

Microwire Interface Timing Diagram 7 20068801 www.national.com ...

Page 8

... Typical Performance Characteristics LMX2515LQ0701 Tuning Range vs. External Inductance (Note 12) Note 11: Typical performance characteristics do not guarantee specific performance limits. For guaranteed specifications, refer to the Electrical Characteristics section. Note 12: The frequency range is defined as the difference between the highest frequency and the lowest frequency of a given unit. For a chosen external inductance, the typical frequency range equals the difference between the Typical Maximum Frequency and the Typical Minimum Frequency ...

Page 9

... VCO RF_B: Preset divide ratio of binary 4-bit programmable counter (2 ≤ RF_B ≤ 15) RF_A: Preset divide ratio of binary 3-bit swallow counter (0 ≤ RF_A ≤ 7 for LMX2515LQ1321 and 0 ≤ RF_A ≤ 3 for LMX2515LQ0701) RF_FN: Preset numerator of binary 10-bit modulus counter < (0 ≤ RF_FN ...

Page 10

... Note 17: The lock detect comparison occurs with every TABLE 3. Lock Detect Modes LD Bit Mode 0 Disable (GND) 1 Enable TABLE 4. Lock Detect Logic LD Output Locked HIGH Not Locked LOW 20068808 for LMX2515LQ1321 and 10 ns for LMX2515LQ0701 cycle of f and R ...

Page 11

Functional Description HIGH SPEED LOCK-UP MODE Two frequency-locking modes are provided: a Normal mode and a High Speed mode for faster lock times. The HS bit in register R0 controls the locking mode. TABLE 5. Lock-up Modes HS Bit 0 ...

Page 12

Programming Description GENERAL PROGRAMMING INFORMATION The serial interface has a 24-bit shift register to store the incoming data bits temporarily. The incoming data is first loaded into the shift register from MSB to LSB. The data is shifted at the ...

Page 13

... The HS bit selects between normal and high speed locking mode. The RF_SEL bit is set to "0" for the LMX2515LQ0701 and "1" for the LMX2515LQ1321. The RF N counter consists of the 4-bit programmable counter (RF_B counter), the 3-bit swallow counter (RF_A counter) and the 10-bit delta sigma modulator (RF_FN counter) ...

Page 14

... Output frequency of voltage controlled oscillator (VCO) VCO RF_B: Preset divide ratio of binary 4-bit programmable counter (2 ≤ RF_B ≤ 15) RF_A: Preset divide ratio of binary 3-bit swallow counter (0 ≤ RF_A ≤ 7 for LMX2515LQ1321 and 0 ≤ RF_A ≤ 3 for LMX2515LQ0701) RF_FN: Preset numerator of binary 10-bit modulus counter (0 ≤ RF_FN ...

Page 15

... The reference frequency selection bits, OSC_FREQ [1:0], are used to set the reference clock and R divider for use with one of the following reference frequencies: 12.6 MHz, 14.4 MHz, 25.2 MHz or 26.0 MHz. The LMX2515 uses the OSC_FREQ bits along with the RF_SEL and RX/TX bits to determine the correct divide ratios needed to meet the required channel spacing for the mode of operation selected ...

Page 16

Programming Description R2 REGISTER The R2 register address bits (R2 [1:0]) are “10”. MSB (Default) R3 REGISTER The R3 register address bits (R3 [2:0]) are “011”. This register is ...

Page 17

... NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant ...

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