lmx2532 National Semiconductor Corporation, lmx2532 Datasheet - Page 10

• Manufacturer Part Number: lmx2532
• Description: Pllatinum Frequency Synthesizer System With Integrated Vcos
• Manufacturer: National Semiconductor Corporation

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Programming Description
CONTROL REGISTER CONTENT MAP
The serial interface has a 24-bit shift register to store the incoming data bits temporarily. The incoming Data is loaded into the shift
register from MSB to LSB. The Data is shifted at the rising edge of the Clock signal. When the Latch Enable signal transitions from
LOW to HIGH, the data stored in the shift register is transferred to the proper register depending on the address bit settings. The
selection of the particular register is determined by the control bits indicated in boldface text.
At initial start-up, the MICROWIRE loading requires 4 default words (registers R3, loaded first, to R0, loaded last). After the device
has been initially programmed, the RF VCO frequency can be changed using a single register (R0). If an IF frequency other than
the default value for the device is desired the SPI_DEF bit should be set to 0, the desired values for IF_A, IF_B, and IF_R entered
and words R6 to R0 should be sent.
The control register content map describes how the bits within each control register are allocated to the specific control functions.
NOTE: Bold numbers represent the address bits.
R0
(Default)
R1
(Default)
R2
(Default)
R3
(Default)
R4
R5
R6
MSB
23
SPI_
DEF
IF_
FREQ
[1:0]
IF_
CUR[1:0]
BW_
DUR
[1:0]
0
0
1
22
RF_
SEL
0
0
0
21
RF_
LD
OSC_
FREQ
0
BW_
CRL
[1:0]
0
1
0
20
SP
UR_
CRL
1
0
1
1
0
19
RF_B
[3:0]
0
1
BW_
EN
0
0
0
18 17 16 15 14 13 12
0
0
1
0
0
0
Complete Register Map
0
0
0
0
0
0
SHIFT REGISTER BIT LOCATION
0
1
1
0
0
RF_A
[2:0]
0
1
1
1
0
IF_A
[3:0]
10
0
1
1
0
0
0
0
1
0
SPUR_
RDT
[1:0]
1
0
0
11
1
1
0
IF_R
0
0
0
[8:0]
0
10 9 8 7 6 5 4 3
IF_B
[8:0]
0 1 0 1 OB_
1 0 1 0 0 0 1
0 0 1 1 0 VCO_
0 0 0 0 0 1 1
RF_FN
[10:0]
CRL
[1:0]
CUR
[1:0]
0 1
RF_
EN
0
2
IF_
EN
0
0
1
1
1
1 0
0 0
0 1
1 0
1 1
1 1
1 1
1 1
LSB