sy89826l Micrel Semiconductor, sy89826l Datasheet

no-image

sy89826l

Manufacturer Part Number
sy89826l
Description
Sy89826l 3.3v 1ghz Precision 1 22 Lvds Fanout Buffer/translator With 2 1 Input Mux
Manufacturer
Micrel Semiconductor
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
sy89826lHI
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
sy89826lHY
Manufacturer:
MICREL
Quantity:
1 524
Part Number:
sy89826lHY
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
sy89826lHY TR
Manufacturer:
Micrel Inc
Quantity:
10 000
Micrel, Inc.
/LVPECL_CLK
Precision Edge is a registered trademark of Micrel, Inc.
M9999-011907
hbwhelp@micrel.com or (408) 955-1690
LVPECL_CLK
FEATURES
APPLICATIONS
FUNCTIONAL BLOCK DIAGRAM
/LVDS_CLK
LVDS_CLK
High-performance, 1GHz LVDS fanout buffer/
translator
22 differential LVDS output pairs
Guaranteed AC parameters over temperature and
voltage:
• > 1GHz f
• < 50ps within device skew
• < 400ps t
Low jitter performance
• < 1ps (rms) cycle-to-cycle jitter
• < 1ps (pk-pk) total jitter
2:1 mux input accepts LVDS and LVPECL
3.3V supply voltage
LVDS input includes internal 100 termination
Output enable function
Available in a 64-Pin EPAD-TQFP
Enterprise networking
High-end servers
Communications
100 internal input
termination
MAX
r
/ t
f
time
CLK_SEL
0
1
OE
LEN
D
Q
3.3V 1GHz PRECISION 1:22 LVDS
FANOUT BUFFER/TRANSLATOR
WITH 2:1 INPUT MUX
22 LVDS compatible
22
22
outputs
/Q0 - /Q21
Q0 - Q21
1
1
differential LVDS (Low Voltage Differential Swing) output
pairs. The part is designed for use in low voltage 3.3V
applications that require a large number of outputs to drive
precisely aligned, ultra low-skew signals to their destination.
The input is multiplexed from either LVDS or LVPECL (Low
Voltage Positive Emitter Coupled Logic) by the CLK_SEL
pin. The OE (Output Enable) is synchronous so that the
outputs will only be enabled/disabled when they are already
in the LOW state. This avoids any chance of generating a
runt clock pulse when the device is enabled/disabled as
can happen with an asynchronous control.
than 50ps—performance previously unachievable in a
standard product having such a high number of outputs.
The SY89826L is available in a single space saving package,
enabling a lower overall cost solution.
NOTE:
1. The OE (output enable) signal is synchronized with the low level of the
DESCRIPTION
TRUTH TABLE
The SY89826L is a precision fanout buffer with 22
The SY89826L features a low pin-to-pin skew of less
LVDS_CLK and LVPECL_CLK signal.
OE
0
0
1
1
(1)
CLK_SEL
0
1
0
1
LVPECL_CLK
LVDS_CLK
Q0 – Q21
LOW
LOW
Precision Edge
Rev.: D
Issue Date: January 2007
Precision Edge
Precision Edge
/LVPECL_CLK
SY89826L
/LVDS_CLK
/Q0 – /Q21
HIGH
HIGH
Amendment: /0
SY89826L
®
®
®

Related parts for sy89826l

sy89826l Summary of contents

Page 1

... The SY89826L features a low pin-to-pin skew of less than 50ps—performance previously unachievable in a standard product having such a high number of outputs. The SY89826L is available in a single space saving package, enabling a lower overall cost solution. TRUTH TABLE (1) ...

Page 2

... Connect to GNDI on PCB. No connect pins to be left open. 2 Precision Edge (1) Operating Package Range Marking Industrial SY89826LHI Industrial SY89826LHI Industrial SY89826LHY with Pb-Free bar-line indicator Matte-Sn Industrial SY89826LHY with Pb-Free bar-line indicator Matte- electricals only. A ® SY89826L Lead Finish Sn-Pb Sn-Pb Pb-Free Pb-Free ...

Page 3

... Note 4 Max Load, Max Condition 3 Precision Edge (Note 2) to GND) ..................... +3.0V to +3. ......................... – + ......................................................... 4.4 C/W JC Min Typ 3.0 3.3 46 175 and V are not internally CCI CCO Min Typ 0 100 –1.25 80 100 ® SY89826L Max Units 3 260 mA Max Units 2 120 ...

Page 4

... GNDI +1.8V. CCI CMR = – + Condition 0. – +85 C Condition Note 8, 9 Note 8 Note 8 Note 9 4 Precision Edge SY89826L Min Typ Max Units V –1.165 V –0.880 –1.945 V –1.625 300 mV GNDI +1 ...

Page 5

... LVPECL Input: 800mV LVDS Input: 100mV LVDS Input: 400mV CLK_SEL-to-Valid Output Note 4 Note 4 Note +85 C Note 6 Note 7 Note 8 12 output edges will deviate by more than the specified peak-to- 5 Precision Edge SY89826L Min Typ Max Units 1.0 GHz 0.750 1.0 1.250 ns 0.6 0.850 1.10 ns ...

Page 6

... LVDS IN = 350mV 1800 LVPECL IN = 750mV 1600 1400 LVDS Input 1200 1000 800 600 LVPECL Input 400 200 0 -50 - 100 TEMPERATURE ( C) CLK_SEL Switchover Time vs. Temperature 1800 1600 1400 1200 1000 800 600 400 200 0 -50 - 100 TEMPERATURE ( C) ® SY89826L ...

Page 7

... Micrel, Inc. FUNCTIONAL CHARACTERISTICS 155MHz Output 3. TIME (500ps/div.) M9999-011907 hbwhelp@micrel.com or (408) 955-1690 1GHz Output 3. TIME (100ps/div.) 7 Precision Edge 622MHz Output = 3.3V CC TIME (200ps/div.) ® SY89826L ...

Page 8

... 350mV (typical 1.9k 1.9k 1.4k 1.4k LVDS_CLK 100 /LVDS_CLK GND Figure 2. Simplified LVDS Input Stage 49 49 GND Figure 4. LVDS Common Mode Measurement Q OUT 700mV Q OUT Figure 6. Output Driver Signal Levels (Differential) ® Precision Edge SY89826L v , OCM v OCM — /Q OUT OU ...

Page 9

... Micrel, Inc. DETAILED DESCRIPTION The SY89826L is a precision 1:22 fanout buffer. It accepts either an LVPECL or LVDS input, selectable by an input mux, and outputs 22 LVDS output pairs. The device features a synchronous output enable. The SY89826L provides extremely low skew across its outputs. LVPECL_CLK The SY89826L allows one input with standard LVPECL voltage swing ...

Page 10

... PCB Thermal Consideration for 64-Pin EPAD-TQFP Package + 1 (408) 944-0970 FAX Micrel for any damages resulting from such use or sale. © 2005 Micrel, Incorporated. 10 +0.15 –0.15 +0.006 –0.006 Package EP- Exposed Pad Die http://www.micrel.com WEB ® Precision Edge SY89826L Rev. 02 ...

Related keywords