ics650-27 Integrated Device Technology, ics650-27 Datasheet - Page 4

• Manufacturer Part Number: ics650-27
• Description: Networking Clock Source
• Manufacturer: Integrated Device Technology

External Components
The ICS650-27 requires a minimum number of external
components for proper operation.
Decoupling Capacitor
Decoupling capacitors of 0.01µF must be connected
between each VDD and GND (pins 4 and 6, pins 16 and 14),
as close to the device as possible. For optimum device
performance, the decoupling capacitor should be mounted
on the component side of the PCB. Avoid the use of vias in
the decoupling circuit.
Series Termination Resistor
When the PCB trace between the clock outputs and the
loads are over 1 inch, series termination should be used. To
series terminate a 50 trace (a commonly used trace
impedance), place a 33 resistor in series with the clock line
as close to the clock output pin as possible. The nominal
impedance of the clock output is 20 .
Absolute Maximum Ratings
Recommended Operation Conditions
IDT™ / ICS™ NETWORKING CLOCK SOURCE
ICS650-27
NETWORKING CLOCK SOURCE
Stresses above the ratings listed below can cause permanent damage to the ICS650-27. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these
or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Parameter
Item
4
Crystal Information
The crystal used should be a fundamental mode (do not use
third overtone), parallel resonant. Crystal capacitors should
be connected from pins X1 to ground and X2 to ground to
optimize the initial accuracy. The value of these capacitors
is given by the following equation:
In the equation, C
crystal with a 16pF load capacitance, two 20 pF [(16-6) x 2]
capacitors should be used.
Min.
+3.0
-40
Crystal caps (pF) = (C
7 V
-0.5 V to VDD+0.5 V
-40 to +85 C
-65 to +150 C
175 C
260 C
Typ.
+3.3
L
is the crystal load capacitance. So, for a
Rating
L
Max.
- 6) x 2
+3.6
+85
CLOCK SYNTHESIZER
ICS650-27
Units
V
C
REV E 110409