ics9p935 Integrated Device Technology, ics9p935 Datasheet - Page 2

• Manufacturer Part Number: ics9p935
• Description: Ddr I/ddr Ii Phase Lock Loop Zero Delay Buffer
• Manufacturer: Integrated Device Technology

Pin Description
IDT
Pin# Pin Name
ICS9P935
DDR I/DDR II Phase Lock Loop Zero Delay Buffer
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
TM
/ICS
TM
DDRC0
DDRT0
VDD2.5/1.8
DDRT1
DDRC1
GND
VDDA2.5/1.8
GND
CLK_INT
CLK_INC
VDD2.5/1.8
DDRT2
DDRC2
GND
DDRC3
DDRT3
FB_OUT
FB_IN
SCLK
SDATA
VDD2.5/1.8
DDRT4
DDRC4
GND
VDD2.5/1.8
DDRT5
DDRC5
GND
DDR I/DDR II Phase Lock Loop Zero Delay Buffer
Type
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
I/O
IN
IN
IN
IN
Pin Description
"Complementary" Clock of differential pair output.
"True" Clock of differential pair output.
Power supply, nominal 2.5V or 1.8V
"True" Clock of differential pair output.
"Complementary" Clock of differential pair output.
Ground pin.
Output power supply, nominal 2.5V or 1.8V
Ground pin.
"True" reference clock input.
"Complementary" reference clock input.
Power supply, nominal 2.5V or 1.8V
"True" Clock of differential pair output.
"Complementary" Clock of differential pair output.
Ground pin.
"Complementary" Clock of differential pair output.
"True" Clock of differential pair output.
Feedback output, dedicated for external feedback.
Single-ended feedback input, provides feedback signal to internal PLL to eliminate
phase error with the input clock.
Clock pin of SMBus circuitry, 3.3V tolerant.
Data pin for SMBus circuitry, 3.3V tolerant.
Power supply, nominal 2.5V or 1.8V
"True" Clock of differential pair output.
"Complementary" Clock of differential pair output.
Ground pin.
Power supply, nominal 2.5V or 1.8V
"True" Clock of differential pair output.
"Complementary" Clock of differential pair output.
Ground pin.
2
ICS9P935
REV H 12/1/08