ics8745b Integrated Device Technology, ics8745b Datasheet - Page 8
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ics8745b
Manufacturer Part Number
ics8745b
Description
1 5 Differential-to-lvds Zero Delay Clock Generator
Manufacturer
Integrated Device Technology
Datasheet
1.ICS8745B.pdf
(20 pages)
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Parameter Measurement Information
3.3V LVDS Output Load AC Test Circuit
Phase Jitter and Static Phase Offset
Cycle-to-Cycle Jitter
IDT™ / ICS™ LVDS ZERO DELAY CLOCK GENERATOR
CLK[0:1]
ICS8745B
1:5 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR
CLK[0:1]
FB_IN
FB_IN
Q[0:4]
Q[0:4]
POWER SUPPLY
+
Float GND
3.3V±5%
tjit(Ø) = t(Ø) – t(Ø) mean = Phase Jitter
t(Ø)
(where t(Ø) is any random sample, and t(Ø)
average of the sampled cycles measured on controlled edges)
➤
mean
➤
–
t(Ø)
➤
= Static Phase Offset
tcycle n
tjit(cc) = tcycle n – tcycle n+1
V DDO
V DDA,
V DD,
1000 Cycles
➤
➤
LVDS
tcycle n+1
mean
nQx
Qx
is the
SCOPE
➤
V
V
V
V
OH
OL
OH
OL
8
Differential Input Level
Output Skew
Output Rise/Fall Time
Clock
Outputs
Qy
Qy
Qx
Qx
CLK[0:1]
CLK[0:1]
GND
V DD
20%
V
PP
tsk(o)
80%
t
R
ICS8745BYREV. C OCTOBER 27, 2008
Cross Points
80%
t
F
V
CMR
20%
V
OD