ad7305bnz Analog Devices, Inc., ad7305bnz Datasheet - Page 7

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ad7305bnz

Manufacturer Part Number
ad7305bnz
Description
3 V/5 V, Rail-to-rail Quad, 8-bit Dac
Manufacturer
Analog Devices, Inc.
Datasheet
Table 6. AD7305 Control Logic Truth Table
WR
L
↑+
L
↑+
L
↑+
L
↑+
H
L
H
H
1
2
↑+ positive logic transition; ↓– negative logic transition; X don’t care.
LDAC is a level-sensitive input.
1
A1
L
L
L
L
H
H
H
H
X
X
X
X
A0
L
L
H
H
L
L
H
H
X
X
X
X
LDAC
H
H
H
H
H
H
H
H
L
L
↑+
H
2
Input Register Function
Register A loaded with DB0 to DB7
Register A latched with DB0 to DB7
Register B loaded with DB0 to DB7
Register B latched with DB0 to DB7
Register C loaded with DB0 to DB7
Register C latched with DB0 to DB7
Register D loaded with DB0 to DB7
Register D latched with DB0 to DB7
No effect
Input register x transparent to DB0 to DB7
No effect
No effect, device not selected
A0/SHDN
I
DD
D0–D7
A0, A1
LDAC
V
OUT
WR
Figure 7. AD7305 Timing Diagram Zoom In
Figure 6. AD7305 General Timing Diagram
t
Rev. C | Page 7 of 20
SDN
t
t
WR
LS
t
t
AS
DS
t
S
t
t
t
AH
DH
LH
DAC Register Function
Latched with previous contents, no change
Latched with previous contents, no change
Latched with previous contents, no change
Latched with previous contents, no change
Latched with previous contents, no change
Latched with previous contents, no change
Latched with previous contents, no change
Latched with previous contents, no change
All input register contents loaded, register transparent
Register transparent
All input register contents latched
No effect, device not selected
ERROR BAND
±1 LSB
t
t
SDR
LDW
AD7304/AD7305

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