pi6c185-02b Pericom Semiconductor Corporation, pi6c185-02b Datasheet
pi6c185-02b
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pi6c185-02b Summary of contents
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... Block Diagram Description The PI6C185-02B, a high-speed low-noise 1-7 non-inverting buffer, is designed for SDRAM clock buffer applications intended to be used with the PI6C10X clock generator for Intel Architecture-based Mobile systems ...
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... Pin Description 2 PI6C185-02B I C Address Assignment PI6C185-02 Serial Configuration Map ...
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... The I C interface permits individual enable/disable of each clock output and test mode enable. The PI6C185-02B, a slave receiver device, cannot be read back. Sub addressing is not supported. To change one of the control bytes, all preceding bytes must be sent. Every byte put on the SDATA line must be 8-bits long (MSB first), followed by an acknowledge bit generated by the receiving device ...
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... DC Operating Specifications (V SDRAM Clock Buffer Operating Specification AC Timing = +3.3V ±5 0°C –70° PI6C185-02B Precision 1-7 Clock Buffer PS8469 ...
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... Route clock traces over a continuous ground plane or over a continuous power plane. Avoid routing clock traces from plane to plane (refer to rule #2). 4. Position clock signals away from signals that go to any cables or any external connectors. Figure 1. Clock Waveforms 5 PI6C185-02B Precision 1-7 Clock Buffer ...
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... BSC 6.4 .025 BSC 0.635 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS Pericom Semiconductor Corporation 6 PI6C185-02B Precision 1-7 Clock Buffer .150 3.81 .157 3.99 0.38 .015 x 45 0.41 .016 1.27 .050 .228 .244 1.35 .053 5.79 REF .069 1.75 6.19 SEATING PLANE .004 0.101 .010 0.254 .008 ...