s908gr32ag3vfa Freescale Semiconductor, Inc, s908gr32ag3vfa Datasheet - Page 200

• Manufacturer Part Number: s908gr32ag3vfa
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

System Integration Module (SIM)
POR — Power-On Reset Bit
PIN — External Reset Bit
COP — Computer Operating Properly Reset Bit
ILOP — Illegal Opcode Reset Bit
ILAD — Illegal Address Reset Bit (opcode fetches only)
MODRST — Monitor Mode Entry Module Reset Bit
LVI — Low-Voltage Inhibit Reset Bit
14.7.3 Break Flag Control Register
The break flag control register contains a bit that enables software to clear status bits while the MCU is
in a break state.
BCFE — Break Clear Flag Enable Bit
200
This read/write bit enables software to clear status bits by accessing status registers while the MCU is
in a break state. To clear status bits during the break state, the BCFE bit must be set.
1 = Last reset caused by POR circuit
0 = Read of SRSR
1 = Last reset caused by external reset pin (RST)
0 = POR or read of SRSR
1 = Last reset caused by COP counter
0 = POR or read of SRSR
1 = Last reset caused by an illegal opcode
0 = POR or read of SRSR
1 = Last reset caused by an opcode fetch from an illegal address
0 = POR or read of SRSR
1 = Last reset caused by monitor mode entry when vector locations $FFFE and $FFFF are $FF after
0 = POR or read of SRSR
1 = Last reset caused by the LVI circuit
0 = POR or read of SRSR
1 = Status bits clearable during break
0 = Status bits not clearable during break
POR while IRQ = V
Address:
Reset:
Read:
Write:
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
$FE03
BCFE
Bit 7
R
0
Figure 14-23. Break Flag Control Register (BFCR)
DD
= Reserved
R
6
R
5
R
4
R
3
R
2
R
1
Freescale Semiconductor
Bit 0
R