sg2567fbd28451-ibq ETC-unknow, sg2567fbd28451-ibq Datasheet - Page 21
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sg2567fbd28451-ibq
Manufacturer Part Number
sg2567fbd28451-ibq
Description
Dram Module Ddr2 Sdram 2gbyte 240fbdimm
Manufacturer
ETC-unknow
Datasheet
1.SG2567FBD28451-IBQ.pdf
(30 pages)
Notes:
1. 133MHz for PC2-4200 and 166MHz for PC2-5300.
2. Measured with SSC Disabled.
3. Measured differentially through the range of 0.175V to 0.525V.
4. The crossing point must meet the absolute and relative crossing point specification simultaneously.
5. V
6. Measured with a single-ended input voltage of 1V.
7. Applies to reference clocks SCK and SCK#.
8. Difference between SCK and SCK# input.
9. T1 = ITdata path - TclockpathI (excluding PLL loop delays). This parameter is not a direct clock output parame-
10. The net transport delay is the difference in time of flight between associated data and clock paths. The data
11. Direct measurement of phase jitter records over 10
12. Measured wuth SSC enabled on reference clock generator.
13. As measured after the phase jitter filter. This number is separate from the receiver jitter budget that is defined
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0.710) + 0.250; and Max = 0.5(V
ter but it indirectly determines the clock output parameter T
path is defined from the reference clock source, through the TX, to the data arrival at the data sampling point in
the RX. The clock path is defined from the reference clock source to clock arrival at the same sampling point.
The path delays are caused by copper trace routes, on-chip routing, on-chip buffering, etc. They include the
time of flight of interpolators or other clock adjustments mechanisms. They do not include the phase delays
caused by finite PLL loop bandwidth because these delays are modeled by the PLL transfer functions.
measured over a smaller, yet statistically significant, sample size and the total jitter at 10
lated from an estimate of the sigma of the random jitter components.
by the TRXTotal-MIN parameters.
CROSS_REL_(MIN)
and V
CROSS_REL_(MAX)
havg
- 0.710) + 0.550, where V
are derived using the following calculation: Min = 0.5(V
16
periods is impractical. It is expected that the jitter will be
REF-JITTER
havg
SG2567FBD28451-IBQ
is the average of V
.
SCK-HIGHM
16
March 24, 2008
samples extrapo-
.
havg
21
-