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... Spansion Inc. The information is intended to help you evaluate this product. Do not design in this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice. Publication Number S29AS016J_00 S29AS016J Cover Sheet Revision 04 Issue Date June 4, 2008 ...
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... Questions regarding these document designations may be directed to your local sales office range. Changes may also include those needed to clarify a IO S29AS016J S29AS016J_00_04 June 4, 2008 ...
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... Industrial temperature range (-40°C to +85°C) – Word programming time as fast as 6 µs (typical) Publication Number S29AS016J_00 This document contains information on one or more products under development at Spansion Inc. The information is intended to help you evaluate this product. Do not design in this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice. ...
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... General Description The S29AS016J Mbit, 1.8 Volt-only Flash memory organized as 2,097,152 bytes or 1,048,576 words with a x8/x16 bus and either top or bottom boot sector architecture. The device is offered in Wafer Level Chip Scale Package, and 48-pin TSOP packages. The word-wide data (x16) appears on DQ15–DQ0; the byte- wide (x8) data appears on DQ7– ...
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... Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3. Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.1 Standard TSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.2 WLCSP Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4. Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5. Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.1 S29AS016J Standard Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7. Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7.1 Word/Byte Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7.2 Requirements for Reading Array Data 7.3 Writing Commands/Command Sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.4 Program and Erase Operation Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.5 Standby Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.6 Automatic Sleep Mode ...
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... Erase and Programming Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 20. Package Pin Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 21. Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 21.1 TS 048 - 48-Pin Standard TSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 21.2 U4A 053 - Wafer Level Chip Scale Package (WLCSP 22. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S29AS016J S29AS016J_00_04 June 4, 2008 ...
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... Toggle Bit Timings (During Embedded Algorithms Figure 18.9 DQ2 vs. DQ6 for Erase and Erase Suspend Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . .48 Figure 18.10 Temporary Sector Unprotect/Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Figure 18.11 Sector Protect/Unprotect Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Figure 18.12 Alternate CE# Controlled Write Operation Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 June 4, 2008 S29AS016J_00_04 ( S29AS016J 7 ...
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... Table 9.2 System Interface String . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Table 9.3 Device Geometry Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 Table 9.4 Primary Vendor-Specific Extended Query . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 Table 11.1 S29AS016J Command Definitions (Word Mode .33 Table 11.2 S29AS016J Command Definitions (Byte Mode .34 Table 12.1 Write Operation Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39 Table 16.1 Test Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S29AS016J ...
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... V SS RESET# State WE# Control BYTE# Command WP# Register CE# OE# V Detector CC A0–A19 June 4, 2008 S29AS016J_00_04 ( 1.65–1. Sector Switches Erase Voltage Generator PGM Voltage Generator Chip Enable Output Enable Logic Y-Decoder Timer X-Decoder ...
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... DQ6 41 DQ13 40 DQ5 39 DQ12 38 DQ4 DQ11 35 DQ3 34 DQ10 33 DQ2 32 DQ9 31 DQ1 30 DQ8 29 DQ0 A10 A13 A15 A8 A11 A12 A14 DQ6 DQ7 DQ15/A1 BYTE# DQ13 DQ14 VSS A16 A18 S29AS016J_00_04 June 4, 2008 ...
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... WP# RESET# RY/BY Logic Symbol June 4, 2008 S29AS016J_00_04 ( addresses 15 data inputs/outputs DQ15 (data input/output, word mode), A-1 (LSB address input, byte mode) Selects 8-bit or 16-bit mode Chip enable Output enable Write enable ...
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... Temperature Range Number TFI 01, 02 LFI S29AS016J 1.65–1.95 V, top boot sector device = 1.65–1.95 V, bottom boot sector device Package Packing Type Description 0, 3 TS048 (Note 2) TSOP (Note 1) Wafer Level Chip 2, 3 WLCSP Scale Package S29AS016J_00_04 June 4, 2008 ...
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... See Reading Array Data on page 28 timing specifications and to on page 41 represents the active current specification for reading array data. June 4, 2008 S29AS016J_00_04 ( Table 7.1 S29AS016J Device Bus Operations CE# OE# WE# RESET# WP ...
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... IL RP S29AS016J and OE Word/ Table 7.3 on page 17 has details on Autoselect Mode on page 16 read specifications apply. Refer to Write for timing diagrams. ± 0 but not within IH DC Characteristics in the CC5 S29AS016J_00_04 June 4, 2008 and and AC DC ...
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... If V Temporary Sector Unprotect mode. See feature. 7.8 Output Disable Mode When the OE# input impedance state. June 4, 2008 S29AS016J_00_04 ( RESET# is held at V CC4 IL (not during Embedded Algorithms). The system can read data t READY ...
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... DQ7-DQ0. To access the autoselect codes in-system, the host system can issue the autoselect command via the command register, as shown in Definitions on page 28 Table 7.2 S29AS016J Autoselect Codes (High Voltage Method) Description CE# OE# WE# ...
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... SA37 1 1 SA38 1 1 Note Address range is A19:A-1 in byte mode and A19:A0 in word mode. See June 4, 2008 S29AS016J_00_04 ( Table 7.3 Sector Address Tables (Top Boot Device) Sector Size (Kbytes/ A17 A16 A15 A14 ...
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... B0000–B7FFF 64/32 170000–17FFFF B8000–BFFFF 64/32 180000–18FFFF C0000–C7FFF 64/32 190000–19FFFF C8000–CFFFF 64/32 1A0000–1AFFFF D0000–D7FFF 64/32 1B0000–1BFFFF D8000–DFFFF 64/32 1C0000–1CFFFF E0000–E7FFF 64/32 1D0000–1DFFFF E8000–EFFFF 64/32 1E0000–1EFFFF F0000–F7FFF 64/32 1F0000–1FFFFF F8000–FFFFF 13. S29AS016J_00_04 June 4, 2008 ...
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... SA30 SA31 SA32 SA33 SA34 SA35 SA36 SA37 SA38 June 4, 2008 S29AS016J_00_04 ( for details. Figure 18.11 on page 49 Table 7.5 Sector Block Addresses for Protection/Unprotection Top Boot Sector / Sector Block Size Sector / Sector Block 256 (4 x 64) Kbytes ...
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... Unprotect: Write 40h to sector address with Read from sector address with Set up next sector No address Data = 00h? Yes No Last sector verified? Yes Remove V ID from RESET# Write reset command Sector Unprotect complete S29AS016J_00_04 June 4, 2008 ...
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... Section 7.11. Note that the WP# pin must not be left floating or unconnected; inconsistent behavior of the device may result. June 4, 2008 S29AS016J_00_04 ( shows the timing diagrams, for this feature. If the WP# pin Figure 7.2 Temporary Sector Unprotect Operation ...
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... OE logical one (V IL and OE during power up, the device does not accept commands on the rising IH S29AS016J greater than V . The system must provide the LKO is greater than LKO or WE initiate a write cycle S29AS016J_00_04 June 4, 2008 CC ...
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... Figure 8.1 on page Once the Secured Silicon Sector is locked and verified, the system must write the Exit Secured Silicon Sector Region command sequence to return to reading and writing the remainder of the array. June 4, 2008 S29AS016J_00_04 ( Figure 7 ...
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... Secured Silicon Sector address Write reset with command Secured Silicon Read from Sector Protect Secured Silicon Verify complete Sector address with S29AS016J Sector S29AS016J_00_04 June 4, 2008 ...
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... June 4, 2008 S29AS016J_00_04 ( Table 9.1 Table 9.1 CFI Query Identification String Data 20h 0051h 22h 0052h Query Unique ASCII string “QRY” 24h ...
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... Erase Block Region 2 Information 66h 0000h 68h 0001h 6Ah 0000h 6Ch 0000h Erase Block Region 3 Information 6Eh 0000h 70h 0000h 72h 0000h 74h 0000h Erase Block Region 4 Information 76h 0000h 78h 0000h S29AS016J Description byte N S29AS016J_00_04 June 4, 2008 ...
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... June 4, 2008 S29AS016J_00_04 ( Table 9.4 Primary Vendor-Specific Extended Query Data 80h 0050h 82h 0052h Query-unique ASCII string “PRI” 84h 0049h ...
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... Figure 18.1 on page 43 Table 11.1 on page 33 on address bit A9. ID for valid sector addresses. S29AS016J Erase Suspend/ 28. Read Operations shows the timing diagram. shows the address and data Table 7.2 on page 16, which is intended for Table 7.3 on page 17 S29AS016J_00_04 June 4, 2008 AC and ...
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... The first cycle must contain the data 90h; the second cycle the data F0h. Addresses are don’t care for both cycles. The device then returns to reading array data. Figure 10.1 on page 30 on page 46 for parameters, and to June 4, 2008 S29AS016J_00_04 ( 23. Write Operation Status on page 35 illustrates the algorithm for the program operation ...
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... See Figure 18.6 on page 47 for timing diagrams. S29AS016J START Data Poll from System Verify Data? No Yes Yes Completed shows the address and data requirements Erase/Program Operations S29AS016J_00_04 June 4, 2008 Write ...
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... The system can determine the status of the program operation using the DQ7 or DQ6 status bits, just as in the standard program operation. See information. June 4, 2008 S29AS016J_00_04 ( Write Operation Status on page 35 for information on these status bits ...
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... Figure 10.2 Erase Operation START Write Erase Command Sequence Data Poll from System Embedded Erase algorithm in progress No Data = FFh? Yes Erasure Completed for erase command sequence. for more information. S29AS016J Autoselect Command Sequence S29AS016J_00_04 June 4, 2008 ...
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... 11. Command Definitions Table 11.1 S29AS016J Command Definitions (Word Mode) Command Sequence (Note 1) Addr Read (Note 6) 1 Reset (Note 7) 1 XXX Manufacturer ID 4 Device ID, 6 Top Boot Block Device ID, 6 Bottom Boot Block Secured Silicon Sector Factory 4 Protect, Top Boot ...
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... Table 11.2 S29AS016J Command Definitions (Byte Mode) Command Sequence (Note 1) Read (Note 6) 1 Reset (Note 7) 1 Manufacturer ID 4 Device ID, 6 Top Boot Block Device ID, 6 Bottom Boot Block Secured Silicon Sector Factory 4 Protect, Top Boot (Note 9) Secured Silicon Sector Factory 4 Protect, Bottom Boot ...
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... DQ0–DQ6 while Output Enable (OE#) is asserted low. illustrates this. Table 12.1 on page 39 Polling algorithm. June 4, 2008 S29AS016J_00_04 ( and the following subsections describe the functions of these bits. DQ7, shows the outputs for Data# Polling on DQ7. ...
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... Addr = VA Yes DQ7 = Data DQ5 = 1? Yes Read DQ7–DQ0 Addr = VA Yes DQ7 = Data? No FAIL . shows the outputs for RY/BY#. Figures and Figure 18.6 on page 47 S29AS016J PASS Figure 18.1 on page 43, Figure 18.2 shows RY/BY# for read, reset, program, S29AS016J_00_04 June 4, 2008 ...
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... DQ2 and DQ6. Figure 12.2 on page 38 DQ6/DQ2 on page 38 Figure 18.8 on page 48 between DQ2 and DQ6 in graphical form. June 4, 2008 S29AS016J_00_04 ( 35). shows the outputs for Toggle Bit I on DQ6. Reading Toggle Bits DQ6/DQ2 on page 38 shows the toggle bit timing diagrams ...
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... Read DQ7–DQ0 Toggle Bit = Toggle? Yes No DQ5 = 1? Yes Read DQ7–DQ0 (Notes 1, 2) Twice Toggle Bit = Toggle? Yes Program/Erase Operation Not Complete, Write Reset Command S29AS016J 38). (Note Program/Erase Operation Complete S29AS016J_00_04 June 4, 2008 ...
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... DQ5 switches to 1 when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits. See Exceeded Timing Limits on page 39 2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further details. June 4, 2008 S29AS016J_00_04 ( ...
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... –65°C to +150°C –65°C to +125°C –0 +2.0 V –0 +12.5 V –0 +0 200 mA to –2.0 V for periods +0.5 V. During voltage transitions, input or I/O CC 40. Range –40°C to +85° S29AS016J_00_04 June 4, 2008 to SS ...
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... Icc active while Embedded Erase or Embedded Program is in progress. 3. Not 100% tested. 4. Automatic sleep mode enables the low power mode when addresses remain stable for t Typical sleep mode current is 15 µA. June 4, 2008 S29AS016J_00_04 ( Description ...
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... Don’t Care, Any Change Permitted Does Not Apply Figure 17.1 Input Waveforms and Measurement Levels VCC/2 Measurement Level S29AS016J 100 3 0.0 – 2.0 1.0 1.0 Outputs Steady Changing, State Unknown Center Line is High Impedance State (High Z) VCC/2 Output S29AS016J_00_04 June 4, 2008 Unit ...
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... See Figure 16.1 on page 42 Addresses CE# OE# WE# Outputs RESET# RY/BY June 4, 2008 S29AS016J_00_04 ( Description Read Cycle Time (Note 1) Address to Output Delay Chip Enable to Output Delay Output Enable to Output Delay Chip Enable to Output High Z (Note 1) ...
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... Figure 18.2 RESET# Timings Ready Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms t Ready t RP S29AS016J Test Setup All Speed Options Max 35 Max 500 500 50 Min S29AS016J_00_04 June 4, 2008 Unit µs ns µs ns ...
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... DQ15/A-1 CE# WE# BYTE# Note Refer to the Erase/Program Operations table for t June 4, 2008 S29AS016J_00_04 ( Description t CE# to BYTE# Switching Low or High ELFH BYTE# Switching Low to Output HIGH Z BYTE# Switching High to Output Active Figure 18 ...
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... OUT S29AS016J Speed Options Min Min 20 Byte 6 Word Typ 6 0.5 50 Min 0 Max 90 Read Status Data (last two cycles WHWH1 Status D OUT t RB S29AS016J_00_04 June 4, 2008 Unit ns ns µs sec µs ns ...
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... BUSY RY/BY# Note VA = Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array data read cycle. June 4, 2008 S29AS016J_00_04 ( Figure 18.6 Chip/Sector Erase Operation Timings Erase Command Sequence (last two cycles) ...
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... Valid Status Valid Status (first read) (second read) t BUSY Enter Erase Suspend Program Erase Suspend Read Program S29AS016J Valid Status Valid Data (stops toggling) Erase Resume Erase Erase Suspend Read S29AS016J_00_04 June 4, 2008 Erase Complete ...
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... SA, A6, A1, A0 Data CE# WE# OE# Note For sector protect For sector unprotect June 4, 2008 S29AS016J_00_04 ( Description V Rise and Fall Time (See Note) ID RESET# Setup Time for Temporary Sector Unprotect Figure 18 ...
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... Speed Options 70 Min 70 Min 0 Min 45 Min 35 Min 0 Min 0 Min 0 Min 0 Min 0 Min 35 Min 20 Min 20 Byte Typ 6 Word Typ 6 Typ 0.5 Data# Polling PA DQ7# D OUT = data written to the device. OUT S29AS016J_00_04 June 4, 2008 Unit µs sec ...
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... The device has a minimum erase and program cycle endurance of 100,000 cycles per sector. 20. Package Pin Capacitance Parameter Symbol OUT C IN2 Notes 1. Sampled, not 100% tested. 2. Test conditions T = 25° 1.0 MHz. A June 4, 2008 S29AS016J_00_04 ( Typ (Note 1) Max (Note 2) 0 150 Byte Mode ...
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... (N/2 TIPS) 0.10 REVERSE PIN OUT (TOP VIEW SEATING PLANE 0.08MM (0.0031" WITH PLATING ( BASE METAL SECTION B-B e DETAIL B S29AS016J_00_04 June 4, 2008 3355 \ 16-038.10c ...
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... D1 3.89 BSC E1 1.80 BSC Ø b 0.15 eE 0.40 BSC eD 0.40 BSC eF 0.40 BSC eG 0.40 BSC eH 0.40 BSC SF 0.20 BSC E1,F1,G1 June 4, 2008 S29AS016J_00_04 ( U4A 053 N/A NOM MAX NOTE --- 0.60 PROFILE --- --- BALL HEIGHT 0.40 --- BODY THICKNESS 4.26 4.31 BODY SIZE 2.51 2.56 BODY SIZE MATRIX FOOTPRINT MATRIX FOOTPRINT ...
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... Changed V Sector Protection/Unprotection Corrected and error in the sector group table Revision 03 (October 29, 2007) Ordering information Deleted all Leaded package offerings Table S29AS016J Autoselect Codes Updated table (High Voltage Method) Table Primary Vendor-Specific Corrected the data of CFI address 44 Hex Extended Query Unlock Bypass Command Sequence Corrected the 2nd cycle data of the Unlock Bypass Command from '00' hex to 'F0' hex Under Note 2: Changed the maximum DC input voltage on pin A9 from 12 ...
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... ORNAND2 , HD-SIM and combinations thereof, are trademarks of Spansion LLC in the US and other countries. Other names used are for informational purposes only and may be trademarks of their respective owners. June 4, 2008 S29AS016J_00_04 ( ® , the Spansion Logo, MirrorBit S29AS016J ® ...