s29al016j Meet Spansion Inc., s29al016j Datasheet - Page 14
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s29al016j
Manufacturer Part Number
s29al016j
Description
16 Megabit 2 M X 8-bit/1 M X 16-bit Cmos 3.0 Volt-only Boot Sector Flash Memory
Manufacturer
Meet Spansion Inc.
Datasheet
1.S29AL016J.pdf
(55 pages)
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7.
7.1
7.2
14
Device Bus Operations
Word/Byte Configuration
Requirements for Reading Array Data
This section describes the requirements and use of the device bus operations, which are initiated through the
internal command register. The command register itself does not occupy any addressable memory location.
The register is composed of latches that store the commands, along with the address and data information
needed to execute the command. The contents of the register serve as inputs to the internal state machine.
The state machine outputs dictate the function of the device.
inputs and control levels they require, and the resulting output. The following subsections describe each of
these operations in further detail.
Legend
L = Logic Low = V
Notes
1. Address In = Amax:A0 in WORD mode (BYTE#=V
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector Block
3. If WP# = V
4. D
The BYTE# pin controls whether the device data I/O pins DQ15–DQ0 operate in the byte or word
configuration. If the BYTE# pin is set at logic 1, the device is in word configuration, DQ15–DQ0 are active and
controlled by CE# and OE#.
If the BYTE# pin is set at logic 0, the device is in byte configuration, and only data I/O pins DQ0–DQ7 are
active and controlled by CE# and OE#. The data I/O pins DQ8–DQ14 are tri-stated, and the DQ15 pin is used
as an input for the LSB (A-1) address function.
To read array data from the outputs, the system must drive the CE# and OE# pins to V
control and selects the device. OE# is the output control and gates array data to the output pins. WE# should
remain at V
The internal state machine is set for reading array data upon device power-up, or after a hardware reset. This
ensures that no spurious alteration of the memory content occurs during the power transition. No command is
necessary in this mode to obtain array data. Standard microprocessor read cycles that assert valid addresses
Read
Write
Standby
Output Disable
Reset
Sector Protect
(Note 3)
Sector Unprotect
(Note 3)
Temporary Sector
Unprotect
to A12 in both WORD mode and BYTE mode.
Protection and Unprotection” section.
depends on whether the sector was last protected or unprotected using the method described in
Unprotection on page
IN
Operation
or D
OUT
IL
IH
, the outermost sector remains protected (determined by device configuration). If WP# = V
as required by command sequence, data polling, or sector protection algorithm.
. The BYTE# pin determines whether the device outputs array data in words or bytes.
IL;
H = Logic High = V
19. The WP# contains an internal pull-up; when unconnected, WP is at V
V
0.3 V
CE#
CC
X
X
L
L
L
L
L
D a t a
±
OE#
H
X
H
X
H
H
X
L
IH;
Table 7.1 S29AL016J Device Bus Operations
WE#
V
S h e e t
ID
H
X
H
X
X
L
L
L
= 8.5 V to 12.5 V; X = Don’t Care; A
RESET#
S29AL016J
V
0.3 V
V
V
V
CC
H
H
H
L
IH
ID
ID
ID
), Address In = Amax:A-1 in BYTE mode (BYTE#=V
±
( A d v a n c e
(Note 3)
WP#
X
X
X
X
H
H
H
Sector Address,
Sector Address,
A1 = H, A0 = L
A1 = H, A0 = L
A3 = A2 = L,
A3 = A2 = L,
Addresses
(Note 1)
A6 = H,
Table 7.1
A6 = L,
A
A
A
X
X
X
IN
IN
IN
IN
I n f o r m a t i o n )
= Address In; D
lists the device bus operations, the
(Note 4)
(Note 4)
(Note 4)
(Note 4)
High-Z
High-Z
High-Z
DQ0–
D
DQ7
OUT
IH
S29AL016J_00_05 May 23, 2008
Section 7.10, Sector Protection/
OUT
.
= Data Out
(Note 4)
(Note 4)
IH
BYTE#
High-Z
High-Z
High-Z
D
= V
, the outermost sector protection
IL
OUT
X
X
). Sector addresses are Amax
IH
IL
. CE# is the power
DQ8–DQ15
DQ8–DQ14 = High-Z,
DQ15 = A-1
BYTE#
High-Z
High-Z
High-Z
High-Z
= V
X
X
IL