nt39016d Newhaven Display International, Inc, nt39016d Datasheet - Page 17

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nt39016d

Manufacturer Part Number
nt39016d
Description
One Chip Tft Lcd Driver Ic With Timing Controller For S960xg240 Tft Lcd
Manufacturer
Newhaven Display International, Inc
Datasheet

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SEL[3:0]: Data input mode
Note
Remark:
YUV mode A: Data sequence are “Cb_Y_Cr_Y…”.
YUV mode B: Data sequence are “Cr_Y_Cb_Y…”.
RGB through mode will bypass 3-wire SWD[2:0] function;TCON will not arrange data color mapping.
R04: Source Timing Delay Control Register
Note: DDLY function will be disabled under 8/24bit DE mode and PINCTLB = 0 condition. The default value list in the
timing table will be used when PINCTLB = 0.
R05: Gate Timing Delay Control Register
Note: HDLY function will be disabled under 8/24bit DE mode and PINCTLB = 0 condition. The default value list in the
timing table will be used when PINCTLB = 0.
R06: Reserved
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information.
SEL3
Bit [7:0]
Bit [6:0]
Bit [7:0]
Bit [7]
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Bit
Bit
Bit
Mar 10,2008
: : : :
H sync and Vsync will be floated in CCIR656 and DE mode
SEL2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
DDLY[7:0]
HDLY[6:0]
Name
Name
Name
-
-
SEL1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Initial R/W
Initial R/W
Initial R/W
SEL0
0Dh
46h
-
-
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
R/W
R/W
-
-
8-bit digital RGB through mode input format HV Mode
8-bit digital RGB through mode input format DE Mode
24-bit digital RGB input format HV Mode
24-bit digital RGB input format DE Mode
8-bit digital RGB input format HV Mode
8-bit digital RGB input format DE Mode
Select the HSD signal to 1’st input data delay timing
Under CCIR601 mode, Ths = DDLY[7:0] + 128, (Unit = CLKIN)
Under CCIR656 mode, Ths = DDLY[7:0] + 136, (Unit = CLKIN)
Under RGB 8/24 bit mode, Ths = DDLY[7:0] , (Unit = CLKIN)
The register value will be update to the different default value each time when SEL[3:0]
changed. Read the section of “Timing Table” for the detail, please.
Reserve
Select the Gate start pulse output delay timing
Tvs = HDLY[6:0], (Unit = HSD)
The register value will be update to the different default value each time when SEL[3:0]
changed. Read the section of “Timing Table” for the detail, please.
Reserve
CCIR601 YUV 1280 input format (YUV mode A)
CCIR601 YUV 1280 input format (YUV mode B)
CCIR601 YUV 1440 input format (YUV mode A)
CCIR601 YUV 1440 input format (YUV mode B)
CCIR656 YCbCr input format (YcbCr mode A)
CCIR656 YCbCr input format (YcbCr mode B)
Data input format
(NTSC only)
(NTSC only)
-
-
-
-
17
Preliminary Spec. for NT39016D
(NTSC only)
(NTSC only)
(NTSC only)
(NTSC only)
Description
Description
Description
Operating frequency
24.54 MHz
24.54 MHz
TFT LCD Driver
6.4 MHz
6.4 MHz
27 MHz
27 MHz
27 MHz
27 MHz
27 MHz
27 MHz
27 MHz
27 MHz
-
-
-
-
Version 0.7

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