nt1gc72b89a0nl Nanya Techology, nt1gc72b89a0nl Datasheet - Page 37

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nt1gc72b89a0nl

Manufacturer Part Number
nt1gc72b89a0nl
Description
Registered Ddr3 Sdram Dimm
Manufacturer
Nanya Techology
Datasheet
NT1GC72B89A0NL / NT2GC72B8PA0NL
NT4GC72B4NA1NL / NT4GC72B8NA1NL / NT8GTC72B4NA1NL
1GB: 128M x 72 / 2GB: 256M x 72 / 4GB: 512M x 72 / 8GB: 1G x 72
PC3-8500 / PC3-10600
Registered DDR3 SDRAM DIMM
REV 1.1
06/2009
Command and Address Timing
Calibration Timing
Reset Timing
Self RefreshTimings
Power Down Timings
tACTPDEN Timing of ACT command to Power Down entry
tRDPDEN
tPRPDEN
tIS(base)
tIH(base)
tIS(base)
tZQoper
tCKESR
tCKSRE
tCKSRX
tCPDED
Symbol
tXSDLL
tXPDLL
tMPRR
AC150
tZQCS
tZQinit
tDLLK
tWTR
tMRD
tMOD
tFAW
tFAW
tCCD
tRRD
tRRD
tRTP
tXPR
tCKE
tDAL
tWR
tXS
tXP
tPD
DLL Locking time
Internal READ command to PRECHARGE
Command delay
Delay from start of internal write transaction to
internal read command
WRITE recovery time
Mode Register Set command cycle time
Mode Register Set command update delay
CAS to CAS command delay
Auto Precharge write recovery + precharge time
End of MPR Read burst to MSR for MPR (exit)
ACTIVE to ACTIVE command period (1k page size
-x4/x8)
ACTIVE to ACTIVE command period (2k page size
-x16)
Four activate window (1k page size - x4/x8)
Four activate window (2k page size - x16)
Command and Address setup time to CK, 
referenced Vih(ac) / Vil(ac) levels
Command and Address hold time from CK, 
referenced Vih(ac) / Vil(ac) levels
Commad and Address setup time to CK, 
referenced to Vih(ac) / Vil(ac) levels
Power-up and RESET calibration time
Normal operation Full calibration time
normal operation Short calibration time
Exit Reset from CKE HIGH to a valid command
Exit Self Refresh to Commands not requiring a
locked DLL
Exit Self Refresh to Commands requiring a locked
Minimum CKE low width for Self Refresh entry to
exit timing
Valid Clock Requirement after Self Refresh Entry
(SRE) or Power Down Entry (PDE)
Valid Clock Requirement before Self Refresh
Exit(SRX) or Power-Down Exit (PDX) or Reset Exit
Exit Power Down with DLL on to any valid
command; Exit Precharge Power Down with DLL
frozen to commands not requiring a locked DLL
Exit Precharge Power Down with DLL frozen to
commands requiring a locked DLL
CKE minimm pulse width
Command Pass disable delay
Power Down Entry to Exit Timing
Timing of PRE or PREA command to Power Down
Timing of RD/RDA command to Power Down entry
Parameter
37
tCKE(min)+
1nCK
max(12nCK,
max(10nCK,
max(4nCK,
max(4nCK,
max(4nCK,
max(4nCK,
max(5nCK,
max(5nCK,
tDLLK(min)
max(5nCK,
max(5nCK,
max(3nCK,
max(3nCK,
tRFC(min)
tRFC(min)
tCKE(min)
RL + 4 + 1
5.625ns)
+10ns)
+10ns)
7.5ns)
7.5ns)
7.5ns)
7.5ns)
15ns)
10ns)
10ns)
10ns)
24ns)
DDR3-1066 (-BE)
37.5
min
512
125
200
512
256
15
50
64
4
4
WR + roundup
(tRP/tCK(avg))
1
1
1
1
-
NANYA reserves the right to change products and specifications without notice.
9tREFI
max
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
tCKE(min)+
1nCK
max(12nCK,
max(10nCK,
max(4nCK,
max(4nCK,
max(4nCK,
max(4nCK,
max(5nCK,
max(5nCK,
tDLLK(min)
max(5nCK,
max(5nCK,
max(3nCK,
max(3nCK,
tRFC(min)
tRFC(min)
tCKE(min)
RL + 4 + 1
5.625ns)
65+125
+10ns)
+10ns)
7.5ns)
7.5ns)
7.5ns)
15ns)
10ns)
10ns)
24ns)
© NANYA TECHNOLOGY CORPORATION
DDR3-1333 (-CG)
6ns)
6ns)
min
512
140
512
256
15
30
45
65
64
4
4
WR + roundup
(tRP/tCK(avg))
1
1
1
1
9tREFI
max
0
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Unit
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
ns
ns
ns
ps
ps
ps

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