ltc4350 Linear Technology Corporation, ltc4350 Datasheet - Page 11
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ltc4350
Manufacturer Part Number
ltc4350
Description
Hot Swappable Load Share Controller
Manufacturer
Linear Technology Corporation
Datasheet
1.LTC4350.pdf
(16 pages)
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APPLICATIO S I FOR ATIO
When the power supply is disconnected, the UV pin will
drop below 1.220V if the supply is loaded. The LTC4350
then discharges the gate of the power FET isolating the
load from the power supply.
DESIGN EXAMPLE
Load Share Components
This section demonstrates the calculations involved in
selecting the component values. The design example in
Figure 5 is a 5V output. This design can be extended to
each of the parallel sections.
The first step is to determine the final output voltage and
the amount of adjustment on the output voltage. The
power supply voltage before the load sharing needs to be
lower than the final output voltage. If the load is expecting
to see a 5V output, then all of the shared power supplies
need to be trimmed to 4.90V or lower. This allows 2%
variation in component and reference tolerances so that
the output always starts below 5V.
Now that the output voltage is preset below the desired
output, the LTC4350 will be responsible for increasing the
output utilizing the SENSE
SENSE
OUT
+
+
U
4.9V NOMINAL, 5.3V MAXIMUM
C
0.1µF
UV
U
+
274k
121k
input to the power supply. If
43.2k
12.1k
W
100Ω
R
Figure 5. 5V Load Share (20A per Module)
SET
R
30Ω
0.1µF
OUT
U
R
86.6k
GAIN
51Ω
I
R
GAIN
GND
UV
OV
OUT
SET
V
CC
LTC4350
COMP2
STATUS
4 × SUD50N03-07
COMP1
(0.007Ω EACH)
TIMER
R
150Ω
GATE
P1
C
1µF
SB
P2
R
R
a SENSE
the module’s error amplifier can be used. The next step is
to determine the maximum positive adjustment needed for
each power supply. This adjustment includes any I • R drops
across sense resistors, power FETs, wiring and connec-
tors in the supply path between the power supply and the
load. For example, if the maximum current is 10A and the
parasitic resistance between the power supply and load is
0.01Ω, then the positive adjustment range for I • R drops
is 0.1V. Since the starting voltage is 4.9V ±0.1V, then the
lowest starting voltage can be 4.8V. This voltage is 0.2V
below the target. The total adjustment range that the
LTC4350 will need for this example is 0.1V + 0.2V = 0.3V.
Note that the lowest starting voltage should not be lower
than 300mV below the target voltage.
The I • R drops should be designed to be low to eliminate
the need for additional bulk capacitance at the load. In
most cases the bulk capacitance exists at the power
supply output before the I • R drops. If a 0.002Ω sense
resistor is used and the FET resistance is below 0.003Ω,
then a total 0.005Ω series resistance is acceptable for
loads to 20A. Obviously, the FB pin compensates for the
DC output impedance, but the AC output impedance is the
I • R drops plus the ESR of the capacitors.
FB
R
100Ω
+
–
G
STATUS
C
0.1µF
C
0.1µF
C
1000pF
+
G
T
P1
line is not available, then the feedback divider at
3
1
0.002Ω
R
SENSE
2
4
37.4k
12.1k
BUS
5V
SHARE
BUS
4350 F05
LTC4350
11
4350fa