ltc3787gn Linear Technology Corporation, ltc3787gn Datasheet - Page 24

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ltc3787gn

Manufacturer Part Number
ltc3787gn
Description
Ltc3787 - Polyphase Synchronous Boost Controller
Manufacturer
Linear Technology Corporation
Datasheet

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LTC3787
Minimum On-Time Considerations
Minimum on-time, t
that the LTC3787 is capable of turning on the bottom
MOSFET. It is determined by internal timing delays and
the gate charge required to turn on the top MOSFET. Low
duty cycle applications may approach this minimum on-
time limit.
In forced continuous mode, if the duty cycle falls below
what can be accommodated by the minimum on-time,
the controller will begin to skip cycles but the output will
continue to be regulated. More cycles will be skipped when
V
the top MOSFET continuously on. The minimum on-time
for the LTC3787 is approximately 110ns.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the greatest improvement. Percent efficiency
can be expressed as:
where L1, L2, etc., are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit pro-
duce losses, five main sources usually account for most
of the losses in LTC3787 circuits: 1) IC VBIAS current,
2) INTV
MOSFET transition losses, 5) body diode conduction
losses.
1. The VBIAS current is the DC supply current given in the
24
IN
%Efficiency = 100% – (L1 + L2 + L3 + ...)
Electrical Characteristics table, which excludes MOSFET
driver and control currents. VBIAS current typically
results in a small (<0.1%) loss.
increases. Once V
CC
regulator current, 3) I
ON(MIN)
IN
rises above V
, is the smallest time duration
2
R losses, 4) bottom
OUT
, the loop keeps
2. INTV
3. DC I
4. Transition losses apply only to the bottom MOSFET(s),
5. Body diode conduction losses are more significant at
higher switching frequency. During the dead time, the loss
in the top MOSFETs is I
At higher switching frequency, the dead time becomes a
good percentage of switching cycle and causes the ef-
ficiency to drop.
Other hidden losses, such as copper trace and internal bat-
tery resistances, can account for an additional effi-ciency
degradation in portable systems. It is very important to
include these system-level losses during the design phase.
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge, dQ, moves
from INTV
out of INTV
control circuit current. In continuous mode, I
= f(Q
the topside and bottom side MOSFETs.
MOSFETs, sensing resistor, inductor and PC board traces
and cause the efficiency to drop at high output currents.
and become significant only when operating at low
input voltages. Transition losses can be estimated from:
Transition Loss = (1.7)
2
CC
T
R losses. These arise from the resistances of the
+ Q
current is the sum of the MOSFET driver and
CC
B
), where Q
CC
to ground. The resulting dQ/dt is a current
that is typically much larger than the
L
T
• V
and Q
V
DS
V
OUT
IN
, where V
B
3
I
MAX
are the gate charges of
• C
DS
RSS
is around 0.7V.
• f
GATECHG
3787fa

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