ltc3869gn-2 Linear Technology Corporation, ltc3869gn-2 Datasheet - Page 17

• Manufacturer Part Number: ltc3869gn-2
• Description: Ltc3869/ltc3869-2 - Dual, 2-phase Synchronous Step-down Dc/dc Controllers
• Manufacturer: Linear Technology Corporation

APPLICATIONS INFORMATION
duty cycles up to the maximum of 95%, use the following
equation to find the minimum inductance.
where
Inductor Core Selection
Once the inductance value is determined, the type of in-
ductor must be selected. Core loss is independent of core
size for a fixed inductor value, but it is very dependent
on inductance selected. As inductance increases, core
losses go down. Unfortunately, increased inductance
requires more turns of wire and therefore copper losses
will increase.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Power MOSFET and Schottky Diode
(Optional) Selection
Two external power MOSFETs must be selected for each
controller in the LTC3869: one N-channel MOSFET for the
top (main) switch, and one N-channel MOSFET for the
bottom (synchronous) switch.
The peak-to-peak drive levels are set by the INTV
voltage. This voltage is typically 5V during start-up
(see EXTV
threshold MOSFETs must be used in most applications.
The only exception is if low input voltage is expected (V
< 5V); then, sub-logic level threshold MOSFETs (V
< 3V) should be used. Pay close attention to the BV
specification for the MOSFETs as well; most of the logic
level MOSFETs are limited to 30V or less.
L
f
L
SW
MIN
MIN
is in units of MHz
is in units of µH
>
CC
f
SW
Pin Connection). Consequently, logic-level
• I
V
LOAD(MAX)
OUT
• 1.4
GS(TH)
DSS
CC
IN
Selection criteria for the power MOSFETs include the
on-resistance R
voltage and maximum output current. Miller capacitance,
C
usually provided on the MOSFET manufacturers’ data
sheet. C
along the horizontal axis while the curve is approximately
flat divided by the specified change in V
then multiplied by the ratio of the application applied V
to the gate charge curve specified V
operating in continuous mode the duty cycles for the top
and bottom MOSFETs are given by:
The MOSFET power dissipations at maximum output
current are given by:
where d is the temperature dependency of R
R
at the MOSFET’s Miller threshold voltage. V
typical MOSFET minimum threshold voltage.
Both MOSFETs have I
equation includes an additional term for transition losses,
which are highest at high input voltages. For V
the high current efficiency generally improves with larger
MOSFETs, while for V
increase to the point that the use of a higher R
with lower C
MILLER
DR
Main Switch Duty Cycle =
Synchronous Switch Duty Cycle =
P
P
SYNC
MAIN
(approximately 2Ω) is the effective driver resistance
, can be approximated from the gate charge curve
MILLER
=
=
⎡
⎢
⎢
⎣
(
V
V
V
V
IN
INTVCC
V
IN
OUT
MILLER
IN
)
2
– V
V
DS(ON)
is equal to the increase in gate charge
LTC3869/LTC3869-2
⎛
⎜
⎝
IN
(
I
I
MAX
MAX
OUT
– V
2
1
2
actually provides higher efficiency.
IN
R losses while the topside N-channel
, Miller capacitance C
⎞
⎟ R
⎠
TH(MIN)
)
(
> 20V the transition losses rapidly
2
I
(
MAX
(
1+ d
DR
)
)
V
2
(
V
OUT
+
)
(
C
IN
R
1+ d
MILLER
V
DS(ON)
TH(MIN)
1
)
DS
R
V
DS(ON)
IN
)
. When the IC is
DS
+
•
⎤
⎥
⎥
⎦
– V
V
. This result is
• f
IN
TH(MIN)
DS(ON)
MILLER
OSC
OUT
DS(ON)
IN
17
, input
device
< 20V
is the
and
3869f
DS