ltc3834-1 Linear Technology Corporation, ltc3834-1 Datasheet - Page 12

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ltc3834-1

Manufacturer Part Number
ltc3834-1
Description
30?a Iq Synchronous Step-down Controller
Manufacturer
Linear Technology Corporation
Datasheet
LTC3834-1
APPLICATIO S I FOR ATIO
Accepting larger values of I
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is I
occurs at the maximum input voltage.
The inductor value also has secondary effects. The transi-
tion to Burst Mode operation begins when the average
inductor current required results in a peak current below
10% of the current limit determined by R
inductor values (higher I
lower load currents, which can cause a dip in efficiency in
the upper range of low current operation. In Burst Mode
operation, lower inductance values will cause the burst
frequency to decrease.
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron
cores, forcing the use of more expensive ferrite or
molypermalloy cores. Actual core loss is independent of
core size for a fixed inductor value, but it is very dependent
on inductance selected. As inductance increases, core
losses go down. Unfortunately, increased inductance
requires more turns of wire and therefore copper losses
will increase.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
12
U
L
U
=0.3(I
L
) will cause this to occur at
L
MAX
allows the use of low
W
). The maximum I
SENSE
U
. Lower
L
Power MOSFET and Schottky Diode (Optional)
Selection
Two external power MOSFETs must be selected for each
controller in the LTC3834-1: One N-channel MOSFET for
the top (main) switch, and one N-channel MOSFET for the
bottom (synchronous) switch.
The peak-to-peak drive levels are set by the INTV
voltage. This voltage is typically 5V during start-up (see
EXTV
threshold MOSFETs must be used in most applications.
The only exception is if low input voltage is expected
(V
(V
BV
logic level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the “ON”
resistance R
age and maximum output current. Miller capacitance,
C
usually provided on the MOSFET manufacturers’ data
sheet. C
the horizontal axis while the curve is approximately flat
divided by the specified change in V
multiplied by the ratio of the application applied V
Gate charge curve specified V
in continuous mode the duty cycles for the top and bottom
MOSFETs are given by:
MILLER
IN
GS(TH)
DSS
Main Switch Duty Cycle
Synchronous Switch Duty Cycle
< 5V); then, sub-logic level threshold MOSFETs
CC
specification for the MOSFETs as well; most of the
MILLER
, can be approximated from the gate charge curve
< 3V) should be used. Pay close attention to the
Pin Connection). Consequently, logic-level
DS(ON)
is equal to the increase in gate charge along
, Miller capacitance C
=
DS
V
. When the IC is operating
V
OUT
IN
DS
=
. This result is then
MILLER
V
IN
V
IN
V
, input volt-
OUT
DS
to the
38341f
CC

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