ltc2752lx Linear Technology Corporation, ltc2752lx Datasheet - Page 10

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ltc2752lx

Manufacturer Part Number
ltc2752lx
Description
Ltc2752 Dual16-bit Softspan Iout Dacs Features
Manufacturer
Linear Technology Corporation
Datasheet
LTC2752
S2 (Pin 25): Span Bit 2 Input. In Manual Span mode (M-
SPAN tied to V
to select a single fixed output range for all DACs. These
pins should be tied to either GND or V
unused.
LDAC (Pin 26): Asynchronous DAC Load Input. When
LDAC is a logic low, all DACs are updated (CS/LD must
be high).
I
Complement Force and Sense Pins. Tie to ground via a
clean, low impedance path. These pins may be used with
a precision ground buffer amp as a Kelvin sensing pair
(see the Typical Applications section).
R
Inverting Amplifier. The 20k input resistor is connected
internally from R
R
Applications). Either or both of these precision matched
resistor sets (each set comprising R
may be used to invert positive references to provide the
negative voltages needed by the DACs. Typically 5V; ac-
cepts up to ±15V. Pins 31 and 32 are internally shorted
together.
GE
pin can be used to null gain error or to compensate for
reference errors. The gain change expressed in LSB is
the same for any output range. See System Offset and
Gain Adjustments in the Operation section. Tie to ground
if not used.
R
erence Amplifier Inverting Resistors. The 20k reference
inverting resistors are connected internally from R
R
Diagram). For normal operation tie R
input of the external reference inverting amplifier (see
Typical Applications).
REFB (Pins 35, 36): Feedback Resistor for the DAC B
Reference Inverting Amplifier, and Reference Input for
DAC B. The 20k feedback resistor is connected internally
from REFB to R
the output of the DAC B reference inverting amplifier (see
0
pin FuncTions
OUT2BF
INB
INB
COMB
COMB
ADJB
(Pins 31, 32): Input Resistor for the External Reference
to the external positive reference voltage (see Typical
, I
(Pin 34): Virtual Ground Point for the DAC B Ref-
and from R
(Pin 33): Gain Adjust Pin for DAC B. This control
OUT2BS
DD
COMB
INB
), pins S0, S1 and S2 are pin-strapped
(Pins 28, 29): DAC B Current Output
COMB
. For normal operation tie this pin to
to R
to REFB, respectively (see Block
COMB
. For normal operation tie
INX
COMB
DD
, R
even if they are
COMX
to the negative
and R
INB
EFX
to
)
Typical Applications). Typically –5V; accepts up to ±15V.
Pins 35 and 36 are internally shorted together.
R
These pins provide the translation of the output voltage
range for bipolar spans. Accepts up to ±15V; for normal
operation tie to the positive reference voltage at R
31, 32). Pins 37 and 38 are internally shorted together.
R
operation tie to the output of the I/V converter amplifier for
DAC B (see Typical Applications). The DAC output current
from I
pins. Pins 39 and 40 are internally shorted together.
I
ground when the DAC is operating and should reside at
0V. For normal operation tie to the negative input of the I/V
converter amplifier for DAC B (see Typical Applications).
V
control pin can be used to null unipolar offset or bipolar zero
error. The offset change expressed in LSB is the same for
any output range. See System Offset and Gain Adjustments
in the Operation section. Tie to ground if not used.
V
control pin can be used to null unipolar offset or bipolar zero
error. The offset change expressed in LSB is the same for
any output range. See System Offset and Gain Adjustments
in the Operation section. Tie to ground if not used.
I
ground when the DAC is operating and should reside at
0V. For normal operation tie to the negative input of the I/V
converter amplifier for DAC A (see Typical Applications).
R
operation tie to the output of the I/V converter amplifier for
DAC A (see Typical Applications). The DAC output current
from I
pins. Pins 45 and 46 are internally shorted together.
R
This pin provides the translation of the output voltage
range for bipolar spans. Accepts up to ±15V; for normal
operation tie to the positive reference voltage at R
5, 6). Pins 47 and 48 are internally shorted together.
OUT1B
OUT1A
OSADJB
OSADJA
OFSB
FBB
FBA
OFSA
(Pins 39, 40): DAC B Feedback Resistor. For normal
(Pins 45, 46): DAC A Feedback Resistor. For normal
OUT1B
OUT1A
(Pins 37, 38): Bipolar Offset Resistor for DAC B.
(Pin 41): DAC B Current Output. This pin is a virtual
(Pin 44): DAC A Current Output. This pin is a virtual
(Pins 47, 48): Bipolar Offset Resistor for DAC A.
(Pin 42): DAC B Offset Adjust Pin. This voltage
(Pin 43): DAC A Offset Adjust Pin. This voltage
flows through the feedback resistor to the R
flows through the feedback resistor to the R
INB
INA
(Pins
(Pins
2752f
FBB
FBA

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