ltc2493 Linear Technology Corporation, ltc2493 Datasheet - Page 17

• Manufacturer Part Number: ltc2493
• Description: 24-bit 2-/4-channel Delta Sigma Adc With Easy Drive Input Current Cancellation And I2c Interface
• Manufacturer: Linear Technology Corporation

applicaTions inForMaTion
The first word (SGL, ODD, A2, A1, A0) is used to select the
input channel. The second word of data (IM, FA, FB, SPD)
is used to select the frequency rejection, speed mode (1x,
2x), and temperature measurement.
After power-up, the device initiates an internal reset cycle
which sets the input channel to CH0-CH1 (IN
CH1), the frequency rejection to simultaneous 50Hz/60Hz,
and 1x output rate (auto-calibration enabled). The first
conversion automatically begins at power-up using this
default configuration. Once the conversion is complete,
up to two words may be written into the device.
The first three bits of the first input word consist of two
preamble bits and one enable bit. Valid settings for these
three bits are 000, 100, and 101. Other combinations
should be avoided.
If the first three bits are 000 or 100, the following data
is ignored (don’t care) and the previously selected input
channel remains valid for the next conversion.
SCL
SDA
SCL
SDA
START BY
MASTER
START BY
MASTER
1
ADDRESS
1
7-BIT ADDRESS
7-BIT
…
2
7
…
SLEEP
SLEEP
7
8
R
W
8
LTC2493
LTC2493
ACK BY
ACK BY
Figure 3a. Timing Diagram for Reading from the LTC2493
Figure 3b. Timing Diagram for Writing to the LTC2493
9
9
SIG
1
1
+
1
= CH0, IN
0
MSB
2
2
EN
3
…
D31
SGL ODD
–
=
4
MASTER
ACK BY
9
5
If the first three bits shifted into the device are 101, then
the next five bits select the input channel for the next
conversion cycle (see Table 3).
The first input bit (SGL) following the 101 sequence de-
termines if the input selection is differential (SGL = 0) or
single-ended (SGL = 1). For SGL = 0, two adjacent chan-
nels can be selected to form a differential input. For SGL
= 1, one of 4 channels is selected as the positive input.
The negative input is COM for all single-ended operations.
The remaining four bits (ODD, A2, A1, A0) determine
which channel(s) is/are selected and the polarity (for a
differential input).
Once the first word is written into the device, a second
word may be input in order to select a configuration mode.
The first bit of the second word is the enable bit for the
conversion configuration (EN2). If this bit is set to 0, then
the next conversion is performed using the previously
selected converter configuration.
A2
6
1
A1
DATA INPUT
7
LSB
DATA OUTPUT
A0
2
8
LTC2493
ACK BY
9
3
EN2
1
(OPTIONAL 2ND BYTE)
4
IM
2
FA
SUB LSBs
5
3
FB
4
6
SPD
5
LTC2493
7
6
7
8
MASTER
NAK BY
LTC2493

8
ACK BY
2493 F03b
9
2493 F03a
9
2493fa