ltc2493 Linear Technology Corporation, ltc2493 Datasheet - Page 16

• Manufacturer Part Number: ltc2493
• Description: 24-bit 2-/4-channel Delta Sigma Adc With Easy Drive Input Current Cancellation And I2c Interface
• Manufacturer: Linear Technology Corporation

LTC2493
applicaTions inForMaTion
DATA OUTPUT FORMAT
The output register contains the last conversion result.
After each conversion is completed, the device automati-
cally enters the sleep state where the supply current is
reduced to 1µA. When the LTC2493 is addressed for a read
operation, it acknowledges (by pulling SDA low) and acts
as a transmitter. The master/receiver can read up to four
bytes from the LTC2493. After a complete read operation
(4 bytes), a new conversion is initiated. The device will
NAK subsequent read operations while a conversion is
being performed.
The data output stream is 32 bits long and is shifted out
on the falling edges of SCL (see Figure 3a). The first bit
is the conversion result sign bit (SIG) (see Tables 1 and
2). This bit is high if V
corresponds to the selected input signal IN
second bit is the most significant bit (MSB) of the result.
The first two bits (SIG and MSB) can be used to indicate
over and under range conditions (see Table 2). If both bits
are HIGH, the differential input voltage is equal to or above
+FS. If both bits are set low, the input voltage is below –FS.
The function of these bits is summarized in Table 2. The
24 bits following the MSB bit are the conversion result in

Table 1. Output Data Format
Differential Input Voltage
V
V
FS** – 1LSB
0.5 • FS**
0.5 • FS** – 1LSB
0
–1LSB
–0.5 • FS**
–0.5 • FS** – 1LSB
–FS**
V
*The differential input voltage V
*** Sub LSBs are below the 24-bit level. They may be included in averaging, or discarded without loss of resolution.
IN
IN
IN
*
* ≥ FS**
* < –FS**
IN
≥ 0 and low if V
IN
= IN
+
– IN
–
. **The full-scale voltage FS = 0.5 • V
IN
Bit 31
SIG
< 0 (where V
1
1
1
1
1
0
0
0
0
0
+
– IN
Bit 30
–
MSB
). The
1
0
0
0
0
1
1
1
1
0
IN
REF
Bit 29
.
0
1
1
0
0
1
1
0
0
1
binary two’s, complement format. The remaining six bits
are sub LSBs below the 24-bit level.
As long as the voltage on the selected input channels (IN
and IN
maximum operating range) a conversion result is gener-
ated for any differential input voltage V
• V
greater than +FS, the conversion result is clamped to the
value corresponding to +FS. For differential input voltages
below –FS, the conversion result is clamped to the value
–FS – 1LSB.
Table 2. LTC2493 Status Bits
Input Range
V
0V ≤ V
–FS ≤ V
V
INPUT DATA FORMAT
The serial input word to the LTC2493 is 13 bits long and
is written into the device input register in two 8-bit words.
IN
IN
REF
≥ FS
< –FS
IN
Bit 28
IN
–
to +FS = 0.5 • V
< FS
) remains between –0.3V and V
0
1
0
1
0
1
0
1
0
1
< 0V
Bit 27
0
1
0
1
0
1
0
1
0
1
REF
…
…
…
…
…
…
…
…
…
…
…
. For differential input voltages
Bit 31
SIG
1
1
0
0
Bit 6
LSB
0
1
0
1
0
1
0
1
0
1
CC
IN
Sub LSBs***
+ 0.3V (absolute
from –FS = –0.5
Bits 5-0
XXXXX
XXXXX
XXXXX
XXXXX
XXXXX
XXXXX
XXXXX
XXXXX
00000
11111
Bit 30
MSB
1
0
1
0
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+