irs2548d International Rectifier Corp., irs2548d Datasheet - Page 13

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irs2548d

Manufacturer Part Number
irs2548d
Description
Smps/led Driver Pfc + Half-bridge Control Ic
Manufacturer
International Rectifier Corp.
Datasheet

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Application Information and Additional
Details
I. LED Driver Section
Functional Description
Under-voltage Lock-Out Mode (UVLO)
The under-voltage lock-out mode (UVLO) is defined
as the state the IC is in when VCC is below the turn-
on threshold of the IC. The IRS2548D undervoltage
lock-out is designed to maintain an ultra low supply
current and to guarantee the IC is fully functional
before the high and low-side output drivers and PFC
are activated.
supply voltage scheme using the micro-power start-
up current of the IRS2548D together with a snubber
charge pump from the half-bridge output (R
C
Figure 1: Start-up and supply circuitry.
The VCC capacitors (C
by the current through supply resistor (R
the start-up current drawn by the IC. This resistor is
chosen to set the desired AC line input voltage turn-
on threshold for the system. When the voltage at
VCC exceeds the IC start-up threshold (VCCUV+)
and the ENN pin is below 1.5 volts, the IC turns on
and LO begins to oscillate. The capacitors at VCC
begin to discharge due to the increase in IC
operating current (Figure 2). The high-side supply
voltage, VB-VS, begins to increase as capacitor C
is charged through the internal bootstrap MOSFET
during the LO on-time of each LO switching cycle.
When the VB-VS voltage exceeds the high-side
start-up threshold (VBSUV+), HO then begins to
oscillate. This may take several cycles of LO to
charge VB-VS above VBSUV+ due to RDSon of the
internal bootstrap MOSFET.
VCC1
, C
VCC2
, C
SNUB
Figure 1 shows a possible VCC
, D
CP1
VCC1
and D
and C
CP2
).
VCC2
) are charged
VCC
) minus
VCC
BS
,
13
When LO and HO are both oscillating, the external
MOSFETs (MHS and MLS) are turned on and off with
a 50% duty cycle and a non-overlapping deadtime of
1.6us.
switch between the DC bus voltage and COM. During
the deadtime between the turn-off of LO and the turn-
on of HO, the half-bridge output voltage transitions
from COM to the DC bus voltage at a dv/dt rate
determined by the snubber capacitor (C
snubber capacitor charges, current will flow through
the charge pump diode (D
switching cycles of the half-bridge output, the charge
pump and the internal 15.6V zener clamp of the IC
take over as the supply voltage.
supplies the IC current during the VCC discharge time
and should be large enough such that VCC does not
decrease below UVLO- before the charge pump takes
over.
This
applications, however where PWM dimming is used
the charge pump may not supply enough current to
VCC at low dimming levels and in this case an
auxiliary power supply is required.
Capacitor C
be placed as close as possible and directly between
VCC and COM, and should not be lower than 0.1uF.
Resistors R
high currents that can flow to VCC from the charge
pump. The internal bootstrap MOSFET and supply
capacitor (C
the high side driver circuitry. During UVLO mode the
high and low-side driver outputs HO and LO are both
low and the internal oscillator is disabled.
scheme
V
The half-bridge output (pin VS) begins to
C1
VCC1
1
BS
R
TIME
CONSTANT
) provide the floating supply voltage for
Figure 2: VCC supply voltage.
and R
V
VCC
V
UVLO+
UVLO-
is required for noise filtering and must
& C
VHYST
can
VCC1,2
2
DISCHARGE
are recommended for limiting
C
be
VCC
CP2
used
) to VCC. After several
CHARGE PUMP
OUTPUT
© 2011 International Rectifier
DISCHARGE
TIME
INTERNAL VCC
ZENER CLAMP VOLTAGE
in
IRS2548D
Capacitor C
SNUB
non-dimming
). As the
t
VCC2

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