asm2i99456 PulseCore Semiconductor, asm2i99456 Datasheet
asm2i99456
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asm2i99456 Summary of contents
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... FSELx pins choose between division of the input reference frequency by one or two. The frequency divider can be set individually for each of the three output banks. The ASM2I99456 can be reset and the outputs are disabled by deasserting the MR/OE pin (logic high state). Asserting MR/OE will enable the outputs. ...
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... GND QA1 VCCA QA0 GND MR/OE 3.3V/2.5V LVCMOS Clock Fanout Buffer Notice: The information in this document is subject to change without notice. Bank A CLK 0 CLK÷ VCC/2 Bank Bank ASM2I99456 Logic Diagram ASM2I99456 29 12 ...
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... Output LVCMOS Bank C Outputs No Connect 1 2 VCC VCCA VCCB 3.3V 3.3V 3.3V 3.3V 3.3V or 2.5V 3.3V 2.5V 2.5V 2. REF = f REF = f REF 1 Min -0.3 -0.3 -0.3 -40 ASM2I99456 Function 3 4 VCCC GND 3.3V 0V 3. ÷2 QA0:2 REF ÷2 QB0:2 REF ÷2 QC0:3 REF Internal reset Outputs disabled (tristate) Max Unit Condition 4 ...
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... PP 2 Input pull-up / pull-down resistors influence input current. 3 The ASM2I99456 is capable of driving 50Ω transmission lines on the incident edge. Each output drives one 50Ω parallel terminated transmission line to a termination voltage Alternatively, the device drives up to two 50Ω series terminated transmission lines. ...
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... Note characteristics apply for parallel output termination of 50Ω The ASM2I99456 is functional input and output clock frequency of 350MHz and is characterized up to 250 MHz (AC) is the crosspoint of the differential input signal. Normal AC operation is obtained when the crosspoint is within the V ...
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... Note characteristics apply for parallel output termination of 50Ω The ASM2I99456 is functional input and output clock frequency of 350MHz and is characterized up to 250 MHz (AC) is the crosspoint of the differential input signal. Normal AC operation is obtained when the crosspoint is within the V ...
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... Figure 1. “Single versus Dual Transmission Lines” illustrates an output driving a single series terminated line versus two series terminated lines in parallel. When taken to its extreme the fanout of the ASM2I99456 clock driver is effectively doubled due to its capability to drive multiple lines. ASM2I99456 ...
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... November 2006 rev 0.3 Figure 3. Optimized Dual Line Termination Differential Z =50 0 Pulse Generator Ω Z= – Figure 4. PCLK ASM2I99456 AC Test Reference for VCC = 3.3V and VCC = 2. 3. 2.4 0. Figure 5. Output Transition Time Test Reference ÷T Χ 100 The time from the output controlled edge to the non-controlled edge, divided by the time output controlled edge, expressed as a percentage ...
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... CCQ ASM2I99456, C (Μ)Σ per output, output load the number of active outputs (N is always 12 in case of the ASM2I99456). The ASM2I99456 supports driving transmission lines to maintain high signal the maximum integrity and tight timing parameters. Any transmission line will hide the lumped capacitive load at the end of the ...
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... The following eight derating charts describe the safe frequency operation range for the ASM2I99456. The charts were calculated for a maximum tolerable die junction temperature of 110°C (120°C), corresponding to an estimated MTBF of 9.1 years (4 years), a supply voltage of 3.3V and series terminated transmission line or capacitive loading ...
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... REF 1.00 REF 0.0035 0.0079 0.09 0.2 0.0038 0.0062 0.097 0.157 0.0118 0.0177 0.30 0.45 0.0118 0.0157 0.30 0.40 0.0031 0.0079 0.08 0.20 0.031 BASE 0.8 BASE 0° 7° 0° 7° ASM2I99456 ...
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... REF 1.00 REF 0.0035 0.0079 0.09 0.0038 0.0062 0.097 0.0118 0.0177 0.30 0.0118 0.0157 0.30 0.0031 0.0079 0.08 0° 7° 0° 0.031 BASE 0.8 BASE ASM2I99456 Max 1.2 0.15 1.05 9.2 7.1 9.2 7.1 0.75 0.2 0.157 0.45 0.40 0.2 7° ...
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... Marking ASM2I99456G-32-LT ASM2I99456GL ASM2I99456G-32-LR ASM2I99456GL ASM2I99456G-32-ET ASM2I99456GE ASM2I99456G-32-ER ASM2I99456GE Device Ordering Information Licensed under US patent #5,488,627, #6,646,463 and #5,631,920. 3.3V/2.5V LVCMOS Clock Fanout Buffer Notice: The information in this document is subject to change without notice. Package Type 32-pin LQFP, Tray, Green 32-pin LQFP – ...
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... PulseCore against all claims arising from such use. 3.3V/2.5V LVCMOS Clock Fanout Buffer Notice: The information in this document is subject to change without notice. ASM2I99456 Copyright © PulseCore Semiconductor All Rights Reserved Preliminary Information Part Number: ASM2I99456 Document Version: 0 ...