cs844256bgit Integrated Device Technology, cs844256bgit Datasheet - Page 9
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cs844256bgit
Manufacturer Part Number
cs844256bgit
Description
Femtoclocks? Crystal-to-lvds Frequency Synthesizer W/integrated Fanout Buffer
Manufacturer
Integrated Device Technology
Datasheet
1.CS844256BGIT.pdf
(16 pages)
R
I
LVCMOS C
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
IDT
P
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. To achieve optimum jitter perfor-
mance, power supply isolation is required. The ICS844256I pro-
vides separate power supplies to isolate any high switching noise
from the outputs to the internal PLL. V
be individually connected to the power supply plane through vias,
and 0.01µF bypass capacitors should be used for each pin. Fig-
ure 1 illustrates this for a generic V
V
bypass capacitor be connected to the V
C
The ICS844256I has been characterized with 18pF parallel
resonant crystals. The capacitor values shown in Figure 2
NPUTS
DDA
OWER
ECOMMENDATIONS FOR
RYSTAL
ICS844256I
FEMTOCLOCKS™ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
™
/ ICS
requires that an additional10
:
™
S
LVDS FREQUENCY SYNTHESIZER W/FANOUT BUFFER
I
UPPLY
ONTROL
NPUT
I
resistor can be used.
P
NTERFACE
F
INS
ILTERING
U
NUSED
T
ECHNIQUES
18pF Parallel Crystal
CC
resistor along with a 10µF
I
NPUT AND
DD
pin and also shows that
DDA
, V
pin.
A
DDA
X1
, and V
PPLICATION
F
IGURE
O
UTPUT
DDO
2. C
should
P
RYSTAL
INS
C1
18p
C2
22p
9
I
NFORMATION
O
LVDS Outputs
All unused LVDS output pairs can be either left floating or
terminated with 100
recommend that there is no trace attached.
below were determined using an 18pF parallel resonant
crystal and were chosen to minimize the ppm error.
XTAL_IN
XTAL_OUT
I
NPU
UTPUTS
t I
NTERFACE
:
F
IGURE
1. P
ICS844256BGI REV. A DECEMBER 21, 2007
V
V
DDA
across. If they are left floating, we
DD
OWER
.01 F
S
.01 F
UPPLY
3.3V
F
10
10 F
ILTERING