tn87c196kd20 ETC-unknow, tn87c196kd20 Datasheet - Page 11
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tn87c196kd20
Manufacturer Part Number
tn87c196kd20
Description
Commercial Chmos Microcontroller
Manufacturer
ETC-unknow
Datasheet
1.TN87C196KD20.pdf
(25 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TN87C196KD20
Manufacturer:
TI
Quantity:
4 300
DC CHARACTERISTICS
NOTES:
1. All pins except RESET and XTAL1.
2. Violating these specifications in Reset may cause the part to enter test modes.
3. QBD (Quasi-bidirectional) pins include Port 1, P2.6 and P2.7.
4. Standard Outputs include AD0±15, RD, WR, ALE, BHE, INST, HSO pins, PWM/P2.5, CLKOUT, RESET, Ports 3 and 4,
TXD/P2.0 and RXD (in serial mode 0). The V
5. Standard Inputs include HSI pins, READY, BUSWIDTH, RXD/P2.1, EXTINT/P2.2, T2CLK/P2.3 and T2RST/P2.4.
6. Maximum current per pin must be externally limited to the following values if V
below V
7. Maximum current per bus pin (data and control) during normal operation is
8. During normal (non-transient) conditions the following total current limits apply:
Symbol
I
I
I
I
I
I
I
I
I
I
I
I
I
I
R
C
OH1
IL2
IH1
LI
LI1
TL
IL
IL1
CC
CC
IDLE
IDLE
PD
REF
Port 1, P2.6
HSO, P2.0, RXD, RESET
P2.5, P2.7, WR, BHE
AD0±AD15
RD, ALE, INST±CLKOUT I
RST
S
I
I
I
OL
OH
OH
CC
on Output pins: 10 mA
on quasi-bidirectional pins: self limiting
on Standard Output pins: 10 mA
b
Description
Logical 1 Output Current in Reset
on P2.0. Do not exceed this or
device may enter test modes.
Logical 0 Input Current in Reset
on P2.0. Maximum current that
must be sunk by external device
to ensure test mode entry.
Logical 1 Input Current. Maximum
current that external device must
source to initiate NMI.
Input Leakage Current (Std.
Inputs) (Note 5)
Input Leakage Current (Port 0)
1 to 0 Transition Current (QBD
Pins)
Logical 0 Input Current (QBD Pins)
AD Bus in Reset
Active Mode Current in Reset
(8XC196KD)
Active Mode Current in Reset
(8XC196KD20)
Idle Mode Current (8XC196KD)
Idle Mode Current (8XC196KD20)
Powerdown Mode Current
A/D Converter Reference Current
Reset Pullup Resistor
Pin Capacitance (Any Pin to V
0.7V:
I
I
I
I
OL
OL
OL
OL
OL
: 52 mA
: 29 mA
: 29 mA
: 13 mA
: 13 mA
(Over Specified Operating Conditions) (Continued)
OH
SS
specification is not valid for RESET. Ports 3 and 4 are open-drain outputs.
)
Min
b
6K
I
I
I
I
I
OH
0.8
OH
OH
OH
OH
: 52 mA
: 26 mA
: 11 mA
: 13 mA
is self limiting
Typ
65
80
17
21
8
2
b
Max
a
b
g
b
b
65K
g
75
92
15
10
12.0
25
30
200
650
5
10
70
70
3
g
3.2 mA.
Units
mA
mA
mA
mA
mA
mA
mA
pF
OL
A
A
A
A
A
A
A
is held above 0.45V or V
8XC196KD/8XC196KD20
Test Conditions
V
V
V
0
0
V
V
V
XTAL1
XTAL1
V
V
V
V
V
V
V
XTAL1
XTAL1
IH
IN
IN
IN
IN
IN
CC
CC
CC
CC
CC
CC
CC
k
k
e
e
e
e
e
e
V
V
e
e
e
e
e
e
e
IN k
IN k
V
0.45V
2.4V
2.0V
0.45V
0.45V
e
e
e
V
e
V
V
V
5.5V, V
V
V
CC
PP
PP
PP
PP
PP
PP
16 MHz
20 MHz
16 MHz
20 MHz
V
V
b
e
e
e
e
e
e
CC
REF
1.5V
IN
V
V
V
V
V
V
b
REF
REF
REF
REF
REF
REF
e
0.3V
OH
4.0V
e
e
e
e
e
e
is held
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
11