isl6236 Intersil Corporation, isl6236 Datasheet - Page 20

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isl6236

Manufacturer Part Number
isl6236
Description
High-efficiency, Quad-output, Main Power Supply Controllers For Notebook Computers
Manufacturer
Intersil Corporation
Datasheet

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logic. In addition, SMPS2 can also use REFIN2 to track its
output from 0.5V to 2.50V. The ISL6236 contains fault-
protection circuits that monitor the main PWM outputs for
undervoltage and overvoltage conditions. A power-on
sequence block controls the power-up timing of the main
PWMs and monitors the outputs for undervoltage faults. The
ISL6236 includes an adjustable low drop-out linear regulator.
The bias generator blocks include the linear regulator, 3.3V
precision reference, 2V precision reference and automatic
bootstrap switchover circuit.
The synchronous-switch gate drivers are directly powered
from PVCC, while the high-side switch gate drivers are
indirectly powered from PVCC through an external capacitor
and an internal Schottky diode boost circuit.
An automatic bootstrap circuit turns off the LDO linear
regulator and powers the device from BYP if LDOREFIN is
set to GND or VCC. See Table 1.
FREE-RUNNING, CONSTANT ON-TIME PWM
CONTROLLER WITH INPUT FEED-FORWARD
The constant on-time PWM control architecture is a
pseudo-fixed-frequency, constant on-time, current-mode
type with voltage feed forward. The constant on-time PWM
control architecture relies on the output ripple voltage to
provide the PWM ramp signal; thus the output filter
capacitor's ESR acts as a current-feedback resistor. The
high-side switch on-time is determined by a one-shot whose
period is inversely proportional to input voltage and directly
proportional to output voltage. Another one-shot sets a
minimum off-time (300ns typ). The on-time one-shot triggers
when the following conditions are met: the error comparator's
output is high, the synchronous rectifier current is below the
current-limit threshold, and the minimum off time one-shot
has timed out. The controller utilize the valley point of the
output ripple to regulate and determine the off time.
ON-TIME ONE-SHOT (t
Each PWM core includes a one-shot that sets the high-side
switch on-time for each controller. Each fast, low-jitter,
adjustable one-shot includes circuitry that varies the on-time
in response to battery and output voltage. The high-side
VOLTAGE at BYP
VOLTAGE at BYP
5V
3.3V
2 x LDOREFIN
LDO VOLTAGE
TABLE 1. LDO OUTPUT VOLTAGE TABLE
LDOREFIN < 0.3V,
BYP > 4.63V
LDOREFIN > VCC - 1V,
BYP > 3V
LDOREFIN < 0.3V,
BYP < 4.63V
LDOREFIN > VCC - 1V,
BYP < 3V
0.35V < LDOREFIN < 2.25V
ON
CONDITIONS
)
20
Internal LDO is
disabled.
Internal LDO is
disabled.
Internal LDO is
active.
Internal LDO is
active.
Internal LDO is
active.
COMMENT
ISL6236
switch on-time is inversely proportional to the battery voltage
as measured by the VIN input and proportional to the output
voltage. This algorithm results in a nearly constant switching
frequency despite the lack of a fixed-frequency clock
generator. The benefit of a constant switching frequency is
that the frequency can be selected to avoid noise-sensitive
frequency regions:
See Table 2 for approximate K- factors. Switching frequency
increases as a function of load current due to the increasing
drop across the synchronous rectifier, which causes a faster
inductor-current discharge ramp. On-times translate only
roughly to switching frequencies. The on-times guaranteed
in the Electrical Characteristics are influenced by switching
delays in the external high-side power MOSFET. Also, the
dead-time effect increases the effective on-time, reducing
the switching frequency. It occurs only in PWM mode
(SKIP# = VCC) and during dynamic output voltage
transitions when the inductor current reverses at light or
negative load currents. With reversed inductor current, the
inductor's EMF causes PHASE to go high earlier than
normal, extending the on-time by a period equal to the
UGATE-rising dead time.
For loads above the critical conduction point, the actual
switching frequency is:
where:
• V
• V
• t
(t
or OPEN), VOUT1
(t
VOUT2
(t
VOUT1
(t
or OPEN), VOUT2
t
f
ON
ON
ON
ON
ON
inductor discharge path, including synchronous rectifier,
inductor, and PC board resistances
charging path, including high-side switch, inductor, and PC
board resistances
=
ON
DROP1
DROP2
------------------------------------------------------ -
t
=
= GND, REF,
= GND),
= VCC),
= VCC, REF,
ON
SMPS
V
is the on-time calculated by the ISL6236
K V
----------------------------------------------------------------------------------------------------- -
TABLE 2. APPROXIMATE K-FACTOR ERRORS
OUT
(
(
V
IN
OUT
is the sum of the parasitic voltage drops in the
is the sum of the parasitic voltage drops in the
+
+
V
V
DROP1
+
DROP2
I
LOAD
FREQUENCY
SWITCHING
V
)
(kHz)
400
500
200
300
IN
r
DSON LOWERQ
(
K-FACTOR
(µs)
2.5
2.0
5.0
3.3
)
)
APPROXIMATE
ERROR (%)
K-FACTOR
±10
±10
±10
±10
June 28, 2007
(EQ. 1)
FN6373.3
(EQ. 2)

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