isl6334d Intersil Corporation, isl6334d Datasheet - Page 23

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isl6334d

Manufacturer Part Number
isl6334d
Description
Vr11.1, 4-phase Pwm Controller With Phase Dropping, Droop Disabled And Load Current Monitoring Features
Manufacturer
Intersil Corporation
Datasheet

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At turn-on, the upper MOSFET begins to conduct and this
transition occurs over a time t
approximate power loss is P
A third component involves the lower MOSFET’s reverse
recovery charge, Q
commutated to the upper MOSFET before the lower
MOSFET’s body diode can draw all of Q
through the upper MOSFET across V
dissipated as a result is P
Equation 25:
Finally, the resistive part of the upper MOSFET’s is given in
Equation 26 as P
The total power dissipated by the upper MOSFET at full load
can now be approximated as the summation of the results
from Equations 23, 24, and 25. Since the power equations
depend on MOSFET parameters, choosing the correct
MOSFETs can be an iterative process involving repetitive
solutions to the loss equations for different MOSFETs and
different switching frequencies, as shown in Equation 26.
Current Sensing Resistor
The resistors connected to the ISEN+ pins determine the
gain in the channel-current balance loop and set the
overcurrent trip point. Select values for these resistors by
using Equation 27:
where R
pin, N is the active channel number, R
the current sense element, either the DCR of the inductor or
R
desired overcurrent trip point. Typically, I
to be 1.2 times the maximum load current of the specific
application.
With integrated temperature compensation, the sensed
current signal is independent on the operational temperature
of the power stage, i.e. the temperature effect on the current
sense element R
temperature compensation function. R
should be the resistance of the current sense element at the
room temperature.
When the integrated temperature compensation function is
disabled by pulling the TCOMP pin to GND, the sensed
current will be dependent on the operational temperature of
P
P
P
R
UP 4 ,
SENSE
UP 2 ,
UP 3 ,
ISEN
=
=
r
V
DS ON
ISEN
V
depending on the sensing method, and I
IN
-------------------------- -
105 10
IN
(
Q
I
----- -
R
N
M
×
is the sense resistor connected to the ISEN+
rr
X
)
f
S
I
-------- -
X
UP,4
PP
I
----- -
N
6
2
M
is cancelled by the integrated
rr
I
------------- -
⎞ t
OCP
. Since the inductor current has fully
2
N
.
d
----
2
2
+
I
--------- - d
f
UP,3
PP
12
S
2
UP,2
23
2
and is approximated in
. In Equation 24, the
.
IN
X
X
. The power
is the resistance of
OCP
rr
in Equation 27
, it is conducted
can be chosen
OCP
(EQ. 26)
(EQ. 24)
(EQ. 25)
(EQ. 27)
is the
ISL6334D
the power stage, since the DC resistance of the current
sense element may be changed according to the operational
temperature. R
resistance of the current sense element at the all operational
temperature.
In certain circumstances, it may be necessary to adjust the
value of one or more ISEN resistors. When the components
of one or more channels are inhibited from effectively
dissipating their heat so that the affected channels run hotter
than desired, choose new, smaller values of R
affected phases (see the section entitled “Voltage
Regulation” on page 13). Choose R
desired decrease in temperature rise in order to cause
proportionally less current to flow in the hotter phase, as
shown in Equation 28:
In Equation 28, make sure that ΔT
rise above the ambient temperature, and ΔT
temperature rise above the ambient temperature. While a
single adjustment according to Equation 28 is usually
sufficient, it may occasionally be necessary to adjust R
two or more times to achieve optimal thermal balance
between all channels.
Compensation
The ISL6334D converter can be accurately modeled as a
voltage-mode regulator with two poles at the L-C resonant
frequency and a zero at the ESR frequency. A type III
controller, as shown in Figure 17, provides the necessary
compensation.
The first step is to choose the desired bandwidth, f
compensated system. Choose a frequency high enough to
assure adequate transient performance but not higher than
1/3 of the switching frequency. The type III compensator has
an extra high-frequency pole, f
added noise rejection or to assure adequate attenuation at
the error-amplifier high-order pole and zero frequencies. A
good general rule is to choose f
R
FIGURE 17. COMPENSATION CIRCUIT
ISEN 2 ,
C
R
1
1
=
R
ISEN
X
in Equation 27 should be the maximum DC
ΔT
----------
ΔT
R
FB
R
2
1
C
C
2
C
C
HF
HF
2
. This pole can be used for
COMP
is the desired temperature
VSEN
ISEN,2
= 10f
FB
0
, but it can be
in proportion to the
1
is the measured
ISL6333
ISEN
October 29, 2008
0
, of the
for the
(EQ. 28)
ISEN
FN6802.0

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