isl6306 Intersil Corporation, isl6306 Datasheet - Page 29

• Manufacturer Part Number: isl6306
• Description: 4-phase Pwm Controller With 8-bit Dac Code Capable Of Precision Rds On Or Dcr Differential Current Sensing
• Manufacturer: Intersil Corporation

In Equations 33, L is the per-channel filter inductance
divided by the number of active channels; C is the sum total
of all output capacitors; ESR is the equivalent-series
resistance of the bulk output-filter capacitance; and V
the peak-to-peak sawtooth signal amplitude as described in
Figure 7 and Electrical Specifications.
The optional capacitor C
noise away from the PWM comparator (see Figure 20). Keep
a position available for C
frequency capacitor of between 22pF and 150pF in case any
leading-edge jitter problem is noted.
Once selected, the compensation values in Equation 33
assure a stable converter with reasonable transient
performance. In most cases, transient performance can be
improved by making adjustments to R
value of R
oscilloscope until no further improvement is noted. Normally,
C
Equation 33 unless some performance issue is noted.
COMPENSATION WITHOUT LOAD-LINE REGULATION
The non load-line regulated converter is accurately modeled
as a voltage-mode regulator with two poles at the L-C
resonant frequency and a zero at the ESR frequency. A
type III controller, as shown in Figure 20, provides the
necessary compensation.
Case 1:
Case 2:
Case 3:
C
will not need adjustment. Keep the value of C
C
while observing the transient performance on an
-------------------
2π LC
R
C
f
R
C
R
C
-------------------
2π LC
0
C
C
C
C
C
C
>
1
1
=
=
----------------------------- -
2πC ESR
=
=
=
=
R
------------------------------------------------------------ -
(
R
R
0.75V
------------------------------------------------ -
----------------------------------- -
2πV
2
2
2π
2πV
≤
>
FB
FB
, is sometimes needed to bypass
FB
, and be prepared to install a high-
(
1
0.75V
f
f
)
0
0
V
--------------------------------------------
PP
2
2πf
----------------------------------- -
----------------------------------------- -
0.75 V
29
<
PP
PP
IN
f
0
0.75V
----------------------------- -
2πC ESR
0.75V
R
2
2π f
0
)
R
(
0.75 V
IN
(
FB
V
ESR
V
2π
FB
PP
pp
0
IN
f
(
1
)
V
0
f
IN
IN
2
0
R
(
pp
) C
IN
ESR
C
LC
f
FB
0
L
2
. Slowly increase the
L
)
LC
LC
)
C
from
(EQ. 33)
PP
is
ISL6306
The first step is to choose the desired bandwidth, f
compensated system. Choose a frequency high enough to
assure adequate transient performance but not higher than
1/3 of the switching frequency. The type-III compensator has
an extra high-frequency pole, f
added noise rejection or to assure adequate attenuation at
the error-amplifier high-order pole and zero frequencies. A
good general rule is to choose f
higher if desired. Choosing f
cause problems with too much phase shift below the system
bandwidth.
In the solutions to the compensation equations, there is a
single degree of freedom. For the solutions presented in
Equation 34, R
compensation components are then selected according to
Equation 34.
In Equation 34, L is the per-channel filter inductance divided
by the number of active channels; C is the sum total of all
output capacitors; ESR is the equivalent-series resistance of
the bulk output-filter capacitance; and V
peak sawtooth signal amplitude as described in Figure 7 and
Electrical Specifications.
R
C
C
R
C
FIGURE 20. COMPENSATION CIRCUIT FOR ISL6306 BASED
1
1
2
C
C
=
=
=
=
=
C
R
R
---------------------------------------- -
------------------------------------------------------------------ -
(
-------------------------------------------------------------------- -
0.75 V
------------------------------------------------------------------ -
(
2π
0.75V
1
2π
1
V
LC C ESR
FB
PP
)
)
2
---------------------------------------- -
2
–
R
f
⎛
⎝
f
LC C ESR
0
IN
0
2π
FB
IN
f
C ESR
f
CONVERTER WITHOUT LOAD-LINE
REGULATION
0.75V
HF
(
HF
⎞
⎠
⎛
⎝
FB
(
–
⎛
⎝
2πf
2πf
2
f
0
LCR
LCR
is selected arbitrarily. The remaining
(
HF
f
R
HF
IN
)
HF
FB
R
)
C
LCR
FB
LC 1
FB
LC 1
)
C
V
2
V
–
–
C
PP
FB
PP
⎞
⎠
C
⎞
⎠
HF
HF
to be lower than 10f
HF
IDROOP
. This pole can be used for
COMP
VDIFF
= 10f
FB
PP
0
, but it can be
is the peak-to-
December 8, 2006
0
0
, of the
(EQ. 34)
can
FN9226.1