isl9106 Intersil Corporation, isl9106 Datasheet
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isl9106
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isl9106 Summary of contents
Page 1
... When shutdown, ISL9106 discharges the output capacitor. Other features include internal digital soft-start, enable for power sequence, overcurrent protection, and thermal shutdown. The ISL9106 is offered 3mmx3mm DFN package with 0.9mm typical height. The complete converter can 2 occupy less than 1cm area ...
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... P-Channel MOSFET Peak Current Limit Maximum Duty Cycle PWM Switching Frequency SW Minimum On Time Soft Start-Up Time 2 ISL9106 Thermal Information Thermal Resistance (Notes 1, 2) 3x3 DFN Package . . . . . . . . . . . . . . Junction Temperature Range .-40°C to +125°C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp = 10µ ...
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... Internal PGOOD High Falling Threshold Internal PGOOD Delay Time EN, MODE, RSI Logic Input Low Logic Input High Logic Input Leakage Current Thermal Shutdown Thermal Shutdown Hysteresis 3 ISL9106 = 10µ 10µ (see the Typical Application Circuit). (Continued OUT SYMBOL TEST CONDITIONS Sinking 1mA, VFB = 0 ...
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... FIGURE 3. EFFICIENCY vs LOAD CURRENT ( +25° 2.7 3.4 4.1 INPUT VOLTAGE (V) FIGURE (MODE = ISL9106 100 800 1000 1200 = 3.3V) FIGURE 2. EFFICIENCY vs LOAD CURRENT (V OUT 1.60 1.55 1. 2.7V IN 1.45 1.40 800 1000 1200 = 1.8V) FIGURE 4. SWITCHING FREQUENCY vs INPUT VOLTAGE, OUT = +85°C 4.8 5 ...
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... OUT OUT V SW 2V/DIV V (AC COUPLED) OUT 20mV/DIV 200mA/DIV I L 1μs/DIV FIGURE 11. STEADY-STATE IN SKIP MODE ( 1.8V 35mA) OUT OUT 5 ISL9106 (Continued) 2.50000 2.49375 T = +85°C A 2.48750 2.48125 2.47500 4.8 5 1.5V, FIGURE 8. V OUT 2V/DIV 1V/DIV 200mA/DIV 5V/DIV = 4.2V, FIGURE 10. SOFT-START TO SKIP MODE (V ...
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... I = 0.01A~1A 2V/DIV V (AC COUPLED) 100mV/DIV OUT I 1A/DIV 100μs/DIV FIGURE 17. LOAD TRANSIENT TEST (MODE = 1.5V 0.01A~1A ISL9106 (Continued) 2V/DIV SW 20mV/DIV (AC COUPLED 1A/DIV = 5.0V, FIGURE 14. STEADY-STATE IN PWM MODE (V IN 2V/DIV 100mV/DIV L 1A/DIV = 5.0V; FIGURE 16. LOAD TRANSIENT TEST (MODE = GND, IN ...
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... Input supply voltage. Connect a 10μF ceramic capacitor to power ground connect. EN Enable pin. Enable the device when driven to high. Shut down the chip and discharge output capacitor when driven to low. Do not leave this pin floating. 7 ISL9106 (Continued 2V/DIV (AC COUPLED) 100mV/DIV I L 1A/DIV = 5.0V ...
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... Murata R1, R2, R3 Resistor Various 8 ISL9106 Exposed Pad The exposed pad must be connected to the PGND pin for proper electrical performance. The exposed pad must also be connected to as much as possible for optimal thermal performance. INPUT ISL9106 VIN SW NC PGND EN SGND R1 100k FB PG MODE ...
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... VREF4 PGOOD PG DELAY Theory of Operation The ISL9106 is a step-down switching regulator optimized for battery-powered handheld applications. The regulator operates at typical 1.6MHz fixed switching frequency under heavy load condition to allow small external inductor and capacitors to be used for minimal printed-circuit board (PCB) area ...
Page 10
... RC network. The maximum EAMP voltage output is precisely clamped to the bandgap voltage. Skip Mode With the MODE pin connected to logic high, ISL9106 enters a pulse-skipping mode at light load to minimize the switching loss by reducing the switching frequency. Figure 26 illustrates the skip mode operation. A zero-cross sensing circuit (as shown in Figure 24) monitors the N-Channel MOSFET current for zero crossing ...
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... Mode Selection The MODE pin is provided on ISL9106 to select the operation mode. When it is driven to logic low or ground, the regulator operates in forced PWM mode. Under forced PWM mode, the device remains at the fixed PWM operation (typical at 1.6MHz), regardless of if the load current is high or low ...
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... The PCB layout is a very important converter design step to make sure the designed converter works well, especially under the high current high switching frequency condition. For ISL9106, the power loop is composed of the output inductor L, the output capacitor C OUT PGND pin necessary to make the power loop as small as possible and the connecting traces among them should be direct, short and wide ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 13 ISL9106 L10.3x3C 0.10 C ...