isl9444 Intersil Corporation, isl9444 Datasheet
isl9444
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isl9444 Summary of contents
Page 1
... UV/OV/OC/OT protections in a space conscious 5mmx5mm QFN package. Switching frequency can be set between 200kHz and 1200kHz using a resistor. The ISL9444 can be synchronized to another ISL9444 to reduce any beat frequency. The ISL9444 utilizes internal loop compensation to keep minimum peripheral components for a compact design and a low total solution cost ...
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... RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL9444. For more information on MSL please see techbrief TB363. Pin Configuration ...
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... Diode Emulation Mode with pulse skipping at light load. While connected to VCC_5V, the controllers operate in PWM Mode at light load. Connect this pin to CLKOUT of another ISL9444 or an external clock for synchronization. The controller operates in PWM at light load when synchronized with another ISL9444 or with an external clock. ...
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... Power ground connection for all three PWM channels. This pin should be connected to the sources of the lower MOSFETs and the (-) terminals of the external input capacitors 30 CLKOUT Clock signal output. The frequency of the clock signal is two times of the ISL9444 switching frequency set by the resistor from RT to ground. 31 ISEN2 Current signal input for PWM2 ...
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Block Diagram BOOT1 VCC_5V UGATE1 PHASE1 ADAPTIVE DEAD-TIME V/I SAMPLE TIMING VCC_5V LGATE1 PGND PGND PFI + _ PF REF PFO FB1 15pF 180kΩ 1000kΩ 16kΩ + 0.7V REF ERROR AMP 1 1.55µA EN/SS1 + EN/SS1 1.3V ISEN1 ...
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... Typical Application - ISL9444 C3 10µF C5 0.1µF VOUT1 +1.05V 1.0µH CO1 100µ IRF7907 C7 15.8k 470pF V R2 31.6k PGOOD1 PGOOD1 R7 100k R8 100k R9 100k VOUT2 R14 V 25.5k R15 49.9k 6 ISL9444 C1 1µ VIN VCC_5V EXTBIAS 38 BOOT1 BOOT2 37 UGATE1 UGATE2 39 PHASE1 PHASE2 R3 40 ISEN1 ISEN2 1 ...
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... Typical Application - ISL9444 CIN5 CIN4 10µF 10µF C3 0.22µF RJK0332DPB VOUT1 +5.0V, 18A L1 2.2µ 330µF 330µF Q2 RJK0329DPB CFF1 4700pF R6 R16 10.7k 200 R7 1.74k +16V PGOOD2 V R14 64.9k R15 10k PFO C SS2 47nF PGOOD2 C SS1 47nF PGOOD1 R11 200k R12 200k R13 200k VOUT1 can be connected to EXTBIAS for lower IC power dissipation and IC self-bias ...
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... Table of Contents Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Typical Performance Curves of ISL9444 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 General Description Input Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Internal 5V Linear Regulator (VCC_5V) and External VCC Bias Supply (EXTBIAS Enable Signals and Soft-Start Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Output Voltage Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Tracking Operation ...
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... EN2, EN3 Logic Threshold, Rising EN_THR V EN2, EN3 Logic Threshold, Falling EN_THF 9 ISL9444 Thermal Information Thermal Resistance (Typical QFN Package (Notes Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . .-55°C to +150°C Maximum Operating Temperature . . . . . . . . . . . . . . . . . . . . -40°C to +85°C Maximum Storage Temperature .-65°C to +150°C Pb-free reflow profile ...
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... Gain-BW Product (Note 9) SR Slew Rate (Note 9) PWM REGULATOR t Minimum Off Time OFF_MIN DV Peak-to-Peak Saw-tooth Amplitude (Note 9) RAMP Ramp Offset 10 ISL9444 = 5.0V to 28V, or VCC_5V = 5V ±10%, C_VCC_5V = 4.7µ TEST CONDITIONS VEN/SS1 = VTK/SSx = 0V I_SINK = 1mA I_SOURCE = 1mA I_SINK = 2mA PGOODx = 5V RPULLUP = 10k to 3.3V RPULLUP = 10k to 3. ...
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... Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 10. Check Note 6 for VCC_5V and VIN configurations. 11. Threshold voltage at PHASE1, PHASE2 and PHASE3 pins for turning off the bottom MOSFET during DEM. 11 ISL9444 = 5.0V to 28V, or VCC_5V = 5V ±10%, C_VCC_5V = 4.7µ TEST CONDITIONS R = 20.5kΩ ...
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... FIGURE 4. VCC_5V vs LOAD REGULATION 120 CHANNEL 2/3 100 80 CHANNEL 0.5 1.0 1.5 2.0 2.5 SOFT-START PIN VOLTAGE (V) FIGURE 6. NORMALIZED OUTPUT VOLTAGE vs VOLTAGE ON SOFT-START PIN 12 ISL9444 Oscilloscope plots are taken using the ISL9444EVAL1Z 5.3 5.1 4.9 4.7 4.5 4 100 -40 FIGURE 3. QUIESCENT CURRENT vs TEMPERATURE 2.0 1.6 1.2 0.8 0.4 0 200 250 FIGURE 5. SOFT-START PIN CHARGING CURRENT vs VOLTAGE ON 3 ...
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... FIGURE 11. PWM1 INPUT CURRENT COMPARISON WITH 10.000 3.300 3.296 1.000 3.292 0.100 3.288 0.010 3.284 3.280 0.001 1 10 FIGURE 13. PWM2 INPUT CURRENT COMPARISON WITH Oscilloscope plots are taken using the ISL9444EVAL1Z (Continued) -40 - TEMPERATURE (°C) CCM DEM 0.01 0.1 1 LOAD CURRENT (A) ...
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... VOUT1 @ 1V/DIV PGOOD1 @ 5V/DIV TIME @ 5ms/DIV FIGURE 17. PWM1 START-UP. MODE = DEM, LOAD = 0A TKSS2 @ 2V/DIV VOUT2 @ 2V/DIV PGOOD2 @ 5V/DIV TIME @ 5ms/DIV FIGURE 19. PWM2 START-UP. MODE = DEM, LOAD = 0A Oscilloscope plots are taken using the ISL9444EVAL1Z (Continued) CCM DEM 0.01 0.1 1 LOAD CURRENT (A) MODE = CCM/DEM ENSS1 @ 2V/DIV ...
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... VOUT1 @ 20mV/DIV. LOAD = 1000mA TIME @ 2µs/DIV FIGURE 23. PWM1 OUTPUT RIPPLE, MODE = 5V (CCM) 2A TIME @ 20µs/DIV FIGURE 25. PWM1 OCP RESPONSE. OUTPUT SHORT-CIRCUITED TO Oscilloscope plots are taken using the ISL9444EVAL1Z (Continued) TKSS3 @ 2V/DIV VOUT3 @ 1V/DIV PGOOD3 @ 5V/DIV INDUCTOR CURRENT @ 2A/DIV TIME @ 5ms/DIV TIME @ 2µ ...
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... EN/SS1 for PWM1 to ground and from TK/SSx pins to ground for PWM2 and PWM3. Inrush current during start-up can be alleviated by adjusting the soft-starting time. After the VCC_5V pin reaches the UVLO threshold, the ISL9444 PWM1 soft-start circuitry becomes active. The internal 1.55µA charge current begins charging up the soft-start capacitor connected from the EN/SS1 pin to GND ...
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... CLKOUT pin of another ISL9444, the two controllers operate in synchronization. When the MODE/SYNC pin is connected to an external clock, the ISL9444 will synchronize to this external clock at half of the clock frequency. For proper operation, frequency setting resistor, R should be set according to Equation 1. When frequency synchronization is in action, the controllers will enter forced continuous current mode at light load ...
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... EMI. The typical operating curves show the synchronized 180° out-of-phase operation. Power Failure Monitor The ISL9444 has a Power-Failure Monitor that helps to monitor an additional critical voltage on the Power-Fail Input (PFI) pin. For example, the PFI pin could be used to provide an early power-fail warning, detect a low-battery condition, or simply monitor a power supply ...
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... ISL9444 will turn off both the upper MOSFET and the lower MOSFET. The ISL9444 will enter hiccup mode until the output voltage returns to 110% of the nominal output voltage. ...
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... ISL9444 Layout Guidelines Careful attention to layout requirements is necessary for successful implementation of an ISL9444 based DC/DC converter. The ISL9444 switches at a very high frequency and therefore the switching times are very short. At these switching (EQ. 11) frequencies, even the shortest trace has significant impedance. ...
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... One of the parameters limiting the converter’s response to a load transient is the time required for the inductor current to slew to its new level. The ISL9444 will provide either 0% or maximum duty cycle in response to a load transient. The response time is the time interval required to slew the inductor current from an initial current value to the load current level ...
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... The ESR zero should be placed rather large range, to provide additional phase margin. The recommended output capacitor value for the ISL9444 is between 100µF to 680µF, to meet stability criteria with external compensation. Use of aluminum electrolytic (POSCAP) or tantalum type capacitors is recommended ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see 23 ISL9444 www.intersil.com/askourstaff http://rel.intersil.com/reports/search.php For additional products, see www ...
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... Package Outline Drawing L40.5x5B 40 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 0, 5/10 5.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( 4. 80 TYP ) ( 3.50 ) TYPICAL RECOMMENDED LAND PATTERN 24 ISL9444 40X 0.40 ± 0.10 BOTTOM VIEW MAX 1.00 ( 36X 0.4) SIDE VIEW (40X 0.20 REF MIN MAX. ...