isl12008 Intersil Corporation, isl12008 Datasheet
isl12008
Available stocks
Related parts for isl12008
isl12008 Summary of contents
Page 1
... ISL12008IB8Z 12008 IBZ 2.7 to 5.5 - SOIC M8.15 ISL12008IB8Z-T* 12008 IBZ 2.7 to 5.5 - SOIC M8.15 *Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations) ...
Page 2
... The Serial Clock (SCL) input is used to clock all serial data into and out of the device. 7 FT/OUT 512Hz Frequency Output or digital output pin. The function is set via the configuration register. This pin is open drain and requires an external pull-up resistor Power supply DD 2 ISL12008 INTERFACE RTC DIVIDER POR FREQUENCY OUT ...
Page 3
... Hysteresis SDA and SCL Input Buffer Hysteresis V SDA Output Buffer LOW Voltage, Sinking 3mA OL Cpin SDA and SCL Pin Capacitance 3 ISL12008 Thermal Information Thermal Resistance (Typical, Note 1) 8 Lead SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below + 0.5 http://www ...
Page 4
... C specific parameters and are not tested, however, they are used to set conditions for testing devices to validate specification. 8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 4 ISL12008 Recommended Operating Conditions. Unless otherwise specified. (Continued) TEST CONDITIONS Any pulse narrower than the max spec is suppressed ...
Page 5
... SDA (OUTPUT TIMING) Symbol Table WAVEFORM INPUTS Must be steady May change from LOW to HIGH May change from HIGH to LOW Don’t Care: Changes Allowed N/A 5 ISL12008 HIGH LOW t SU:DAT t HD:DAT OUTPUTS Will be steady Will change from LOW to HIGH Will change ...
Page 6
... The X1 and X2 pins are the input and output, respectively inverting amplifier. An external 32.768kHz quartz crystal is used with the ISL12008 to supply a timebase for the real time clock. Internal compensation circuitry provides high accuracy over the operating temperature range from -40°C to +85°C. ...
Page 7
... DD Many types of batteries can be used with Intersil RTC products. For example, 3.0V or 3.6V Lithium batteries are appropriate, and battery sizes are available that can power the ISL12008 for years. Another option is to use a super capacitor for applications where V 7 ISL12008 month. See “Application Section” on page 16 for more information ...
Page 8
... For example, battery-backed RTCs are commonly packaged on a board with a battery connected. In order to preserve battery life, the ISL12008 will not draw any power from the battery source until after the device is first powered up from the V source ...
Page 9
... Also provided is the ability to adjust the crystal capacitance when the ISL12008 switches from V DD mode. See “Battery Backup Mode (V BAT (V )” on page 7. DD Register Descriptions The battery-backed registers are accessible following a slave byte of “1101000x” and reads or writes to addresses [00h:1Fh]. The defined addresses and default values are described in Table 1 ...
Page 10
... OF bit to set to “1” due to no crystal oscillation on the X1 pin. The ST bit is set to “0” on power-up for normal operation. Bit register contain the Oscillator Fail Indicator bit (OF). This bit is set to a “1” when the X1 pin has no 10 ISL12008 TABLE 1. REGISTER MEMORY MAP BIT ...
Page 11
... Years divisible by 100 are not leap years, unless they are also divisible by 400. This means that the year 2000 is a leap year, the year 2100 is not. The ISL12008 does not correct for the leap year in the year 2100. Control and Status Registers Addresses [07h to 0Bh] ...
Page 12
... FT/OUT pin is selected by the Digital Output selection bit (OUT). The FT bit is set to “0” on power-up. The FT/OUT pin is an open drain output requires the use of a LOAD (ATR = 011111b pull-up resistor. LOAD /V operation, the ISL12008 provides the DD BAT CAPACITANCE BMATR1 BMATR0 (C BAT ...
Page 13
... Protocol Conventions Data states on the SDA line can change only during SCL LOW periods. SDA state changes during SCL HIGH are reserved for indicating START and STOP conditions (see Figure 10). On power-up of the ISL12008, the SDA pin is in the input mode. 2 All I ...
Page 14
... MASTER SDA OUTPUT FROM TRANSMITTER HIGH IMPEDANCE SDA OUTPUT FROM RECEIVER START FIGURE 11. ACKNOWLEDGE RESPONSE FROM RECEIVER SIGNALS FROM S THE MASTER T IDENTIFICATION SIGNAL AT SDA 1 SIGNALS FROM THE ISL12008 14 ISL12008 1 8 WRITE ADDRESS BYTE BYTE FIGURE 12 ...
Page 15
... R/W bit is a “0” , then a write operation (refer to Figure 12). After loading the entire Slave Address Byte from the SDA bus, the ISL12008 compares the Slave bit and device select bits with “1101000”. Upon a correct compare, the device outputs an acknowledge on the SDA line. ...
Page 16
... In addition to the analog compensation afforded by the adjustable load capacitance, a digital compensation feature is available for the ISL12008. There are 6 bits known as the 16 ISL12008 Digital Trimming Register (DTR). The range provided is -63.0695ppm to +126.139ppm. DTR operates by adding or skipping pulses in the clock counter ...
Page 17
... A super capacitor can be used as an alternative to a battery in cases where shorter backup times are required. Since the battery backup supply current required by the ISL12008 is extremely low possible to get months of backup operation using a super capacitor. Typical capacitor values are a few µ more, depending on the application ...
Page 18
... BAT voltage from fully charged to loss of operation. Note that I is the total of the supply current of the ISL12008 (I TOT plus the leakage current of the capacitor and the diode these calculations assumed to be extremely small LKG and will be ignored ...
Page 19
... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 19 ISL12008 M8.15 (JEDEC MS-012-AA ISSUE C) 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE ...